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AMD

Designs chips for computers and AI systems

Senior SoC Power Modeling Engineer

Hardware EngineeringConfirmed live in the last 24 hours
Full-timeAustin, TX, USANo salary listedIn-person

About the Job

Requirements

  • Professional experience in power modeling, power estimation, or SoC power analysis.
  • Strong understanding of SoC power architecture and dynamic voltage and frequency scaling (DVFS).
  • Strong understanding of static and dynamic power components.
  • Strong understanding of EDC, TDC, and electrical and thermal constraints.
  • Hands-on experience building SoC-level power models from IP-level models.
  • Experience creating and analyzing voltage-frequency curves.
  • Experience with embedded or automotive SoCs.
  • Familiarity with x86 CPU, GPU, memory, and fabric power behaviors.
  • Exposure to power modeling tools, spreadsheets, or internal frameworks used for pre-silicon estimation.
  • Experience with workload-driven modeling and benchmark abstraction.
  • Strong analytical and scripting skills; Python is preferred.
  • Ability to work across architecture, IP, performance, and validation teams.
  • Prior involvement in power correlation with silicon.
  • Ability to communicate modeling assumptions and results to senior technical stakeholders.
  • BS or MS in Electrical Engineering, Computer Engineering, or a related field.

Responsibilities

  • Develop and maintain SoC-level power models for Embedded x86 platforms using IP-level inputs from CPU, GPU, fabric, memory, and I/O.
  • Create use-case-driven power models representing automotive, industrial, edge computing, and customer-specific embedded workloads.
  • Translate real-world workloads into model inputs such as activity factors, concurrency, residency, and DVFS states.
  • Build and maintain voltage-frequency curves across operating corners.
  • Derive and validate EDC, TDC, and current limits based on modeled workloads and platform constraints.
  • Perform sensitivity studies across frequency, voltage, workload mix, and power states.
  • Integrate IP-level power models into cohesive SoC-level frameworks.
  • Ensure consistency of assumptions across IPs, including clocking, power states, gating, and DVFS.
  • Identify gaps, inconsistencies, or inaccuracies in IP models and drive closure with IP teams.
  • Partner with SoC and power architects to influence early architectural decisions.
  • Evaluate power, performance, and area trade-offs for new features, configurations, and SKUs.
  • Support bounding-box analysis and product positioning decisions.
  • Support pre-silicon to post-silicon correlation of power models.
  • Refine models using silicon data, profiling, and validation feedback.
  • Improve modeling methodologies, accuracy targets, and documentation.

About the Company

AMD

Designs chips for computers and AI systems

AMD designs processors, graphics chips and AI accelerators for computer makers, cloud operators and businesses that build electronic devices. Its Ryzen processors power personal computers, while EPYC processors handle work in data centers and Radeon chips render graphics. Instinct accelerators run AI models, paired with software that developers use to train models and put them into production. AMD sells chips and related computing systems through equipment makers, distributors and retail channels, and contracts with outside foundries to fabricate its semiconductor designs. It was founded in 1969 and has its headquarters in Santa Clara, California.

Company size
10,001+
Company stage
IPO
Headquarters
Santa Clara, CA
Founded
1969

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