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Capgemini

Global consulting, technology services, outsourcing

RTL Design Architect

Silicon & ASIC DesignUpdated on Nov 14
Full-timeBengaluru, Karnataka, IndiaNo salary listed

About the Job

Requirements

  • 12–20+ years of experience in protocol/IP development.
  • Deep expertise in PCIe Gen4/5/6.
  • Expertise in UCIe architecture.
  • Experience with the chiplet ecosystem.
  • Strong knowledge of the protocol stack and LTSSM.
  • Experience with root complex, endpoint, and switch architectures.
  • Experience integrating PCIe into large SoCs.
  • Strong architecture and verification background.
  • Knowledge of SerDes architecture.

Responsibilities

  • Lead architecture, integration, and verification strategy for high-speed connectivity IPs and chiplet interconnect solutions.
  • Define PCIe/CXL/UCIe subsystem architecture.
  • Drive protocol compliance strategy.
  • Review integration architecture and performance requirements.
  • Lead interoperability and compliance planning.
  • Guide verification and validation teams.
  • Interface directly with customer architects.
  • Support roadmap and future standard adoption.

About the Company

Capgemini

Global consulting, technology services, outsourcing

Capgemini provides consulting, technology services, and outsourcing to help organizations transform digitally. Its offerings include strategy and transformation consulting, system integration, application development, IT infrastructure management, and managed IT operations. It differentiates itself with a global presence in over 50 countries and a focus on applying AI, cloud, and cybersecurity to real business problems. Its goal is to help clients navigate digital transformation and improve efficiency and innovation through tailored, contract-based or managed services.

Company size
10,001+
Company stage
IPO
Headquarters
Paris, France
Founded
1967

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