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BTA Design Services

Senior FPGA Design Engineer

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeOttawa, ON, CanadaIn-person

About the Job

Requirements

  • Approximately 10 to 15 years of hands-on FPGA design experience at a level supporting rapid ramp-up and growth into a design-prime role.
  • Strong, current design expertise in SystemVerilog.
  • Practical experience identifying and handling clock domain crossings (CDC).
  • Hands-on experience configuring synthesis tool settings.
  • Solid command of timing constraints (SDC) and constraint development.
  • Proven ability to analyze synthesis tool reports and act on the findings.
  • Availability to work full-time, on-site at the client's Ottawa location.

Responsibilities

  • Design and implement FPGA logic in SystemVerilog from micro-architecture through to a working, timing-clean design.
  • Analyze and correctly handle clock domain crossings (CDC), including synchronization strategy and CDC verification.
  • Own the synthesis flow by configuring tool settings, writing and maintaining timing constraints, and driving designs to timing closure.
  • Analyze synthesis and timing reports in depth to identify and resolve timing, congestion, and resource issues.
  • Partner with verification and systems teams to ensure designs are correct, testable, and implementation friendly.
  • Contribute to design reviews, documentation, and continuous improvement of the team's FPGA design practices.

Desired Qualifications

  • Some exposure to UVM-based verification.
  • Scripting skills, for example Tcl or Python, to support and automate design flows.
  • Familiarity with high-speed interfaces common in optical and networking products.

About the Company

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