Applications Engineering - Staff Engineer

We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

• Support customer deployments of HAPS and ProtoCompiler, working through the ASIC-to-FPGA flow including partitioning, synthesis, place-and-route, timing closure, and hardware bring-up
• Debug customer designs involving interface IP such as DDR4/DDR5, LPDDR, PCIe, Ethernet, USB, AXI, and other standard protocols
• Reproduce and analyze technical issues reported by customers, working with R&D to identify root causes and deliver solutions or workarounds
• Develop and document methodologies for partitioning strategies, clock architecture, debug instrumentation, and bring-up procedures
• Collaborate with Sales and Customer Success teams to support technical evaluations, proof-of-concept engagements, and deployment planning
• Use Verdi, ProtoCompiler runtime debug tools, and protocol analyzers to troubleshoot RTL, netlist, timing, and hardware issues

• Help customers get their prototypes running so they can start software development and system validation weeks or months earlier
• Solve technical problems that unblock critical customer milestones and keep their chip schedules on track
• Provide feedback to R&D that improves ProtoCompiler features, usability, and robustness based on real customer use cases
• Build reusable methodologies and documentation that help other applications engineers and customers deploy faster
• Support competitive evaluations where your technical depth and problem-solving ability directly influence customer decisions
• Contribute to the success of SoC programs across AI, automotive, networking, and mobile markets by enabling faster hardware availability

• Bachelor's or Master's in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience
• 5-8 years in FPGA implementation, ASIC design, ASIC verification, FPGA prototyping, or applications engineering
• Solid experience with FPGA synthesis, place-and-route, and timing closure using Xilinx Vivado, Intel Quartus, or similar tools
• Working knowledge of SystemVerilog, RTL design, and verification concepts
• Hands-on experience with at least one interface IP family such as PCIe, DDR, Ethernet, USB, or AXI
• Scripting ability in Tcl, Python, or shell for automation and flow customization
• Experience with Synopsys HAPS, ProtoCompiler, or other FPGA-based prototyping platforms is a strong plus

• You can look at a customer's partitioning result and spot the issues that will cause problems downstream before they waste days on place-and-route
• When a customer says their design does not work, you ask specific questions to narrow down whether it is an RTL issue, a tool issue, a constraint issue, or a hardware issue
• You are comfortable working with incomplete information and figuring out what you need to know to move forward
• You can explain a technical problem to a customer engineer in a way that helps them understand what happened and what to do next
• You do not panic when something breaks. You work through it methodically using logs, waveforms, timing reports, and whatever else is available
• You learn quickly and are not afraid to dig into unfamiliar parts of a design or toolflow to understand what is going on

Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.