Year-round
Posted on 6/4/2026
Provides embedded hardware, software, tools
No salary listed
Chandler, AZ, USA
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Microchip Technology provides embedded system solutions by selling hardware components like microcontrollers, FPGAs, silicon carbide devices, and analog parts, along with software and development tools. Its products work as configurable silicon paired with software and toolchains that engineers use to design and implement embedded systems in domains such as automotive, industrial, consumer electronics, aerospace, and telecom. The company differentiates itself through a broad product portfolio, a strong education and support ecosystem (including Microchip University), and direct B2B sales and services that help customers develop and deploy solutions. Its goal is to be a leading provider of end-to-end embedded system solutions, generating revenue from hardware, software licenses, development tools, and related services.
Company Size
10,001+
Company Stage
IPO
Headquarters
Chandler, Arizona
Founded
1989
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Microchip introduces its 3,3 kV HV-D3 mSiC(R) power modules for solid-state transformers in AI data centers. May 26th 2026 The new silicon carbide modules offer the thermal performance and efficiency needed for SSTs to supply more power to token generation Microchip Technology today announced the availability of its new HV power modules-D3 mSiC(R) 3,3 kVDesigned to facilitate and accelerate the adoption of solid-state transformers (SSTs) in hyperscale AI data centers and other high-voltage power applications, the new modules integrate mSiC MOSFETs.(R) 3,3 kV silicon carbide (SiC) and Schottky diodes in a standard 62 mm package for efficient and direct power supply from the medium voltage network to the server rack. AI data centers continue to expand rapidly, but token generation is limited by available power supply; at the same time, efficiency is a primary factor for return on investment. Traditional architectures based on bulky, low-frequency transformers add complexity, increase losses, and limit flexibility. solid-state transformers They represent a significant turning point for power supplies, as they reduce the number of conversion stages and allow for increased system efficiency. The adoption of distributed DC power in the rack at higher voltages in next-generation AI centers further increases the value of SSTs, whose purpose was to supply regulated DC directly from the medium-voltage grid with fewer conversion stages. Microchip's HV-D3 mSiC modules are specifically designed to meet these requirements. These modules utilize Microchip's mSiC MOSFET technology, which offers excellent R stability.[DS(on)] Regarding temperature, the encapsulation provides 6 kV insulation, incorporates CTI 600 rated materials, and extends the creepage distances, designed to allow for safe high-voltage series connection. The silicon nitride (Si[3]N[4]) substrate improves thermal connectivity and its ability to withstand power cycling, thus helping engineers increase power density with less aggressive cooling. "AI data centers continue to increase the demands on power delivery between the electrical grid and the GPU, making solid-state transformers increasingly important," said Clayton Pillion, vice president of Microchip's High Power Solutions business unit. "Our 3,3 kV HV-D3 mSiC power modules allow designers to reduce the number of devices connected in series by about half compared to other lower-voltage SiC devices when connected to 13,8 kV or 34,5 kV networks. These devices also fill a critical gap in the industrial market for 100-300 A products by integrating discrete SiC devices and much larger power modules." The HV-D3 mSiC power modules are available in half-bridge and common-source configurations, with and without antiparallel Schottky diodes, for applications in the 100-300A range. Microchip's mSiC MOSFET technology offers balanced switching losses for both hard and soft switching topologies, making these devices well-suited for SST designs and other high-frequency, high-voltage systems. While optimized for solid-state transformers in AI data centers, HV-D3 mSiC power modules also address a wide range of applications, including megawatt charging infrastructure for heavy vehicles, auxiliary power supplies for rail and heavy transport, medium-voltage motor drives, and industrial and defense power systems. These markets benefit from the same combination of high insulation, thermal robustness, and efficient power conversion. Microchip has over 20 years of experience developing, designing, manufacturing, and supporting SiC power devices and solutions to help customers adopt SiC easily, quickly, and confidently. The company's mSiC products and solutions are designed to reduce system costs, shorten time to market, and minimize risk. Microchip offers a broad and flexible range of SiC diodes, MOSFETs, and gate drivers. For more information, visit [website address]. www.microchip.com/sic. Development tools The 3,3 kV power modules are supported by a application notes, a design guide, and device and simulation models for rapid prototype development. Microchip also provides global technical support, design services, and on-site application engineering support. Prices and availability 3,3 kV mSiC power modules are now available acquire in production quantities, either directly to Microchip or through a sales representative or authorized distributor from Microchip. High-resolution images are available on Flickr or by editorial contact (free publication):
NASA's new AI space chip could let spacecraft think for themselves. May 25, 2026 0 comments NASA is developing a powerful new computer chip designed to dramatically increase the intelligence and performance of future spacecraft. Through a commercial partnership, the project is creating advanced processing technology capable of helping spacecraft operate more independently during missions far from Earth. NASA's High Performance Spaceflight Computing project is focused on boosting the computing capabilities of spacecraft used in space exploration. Current missions rely on older processors because they are durable enough to survive the extreme conditions of space. While those chips are dependable, they lack the performance needed for more advanced missions. The agency says newer and far more capable processors are essential for future autonomous spacecraft, faster onboard scientific analysis, and supporting astronauts during missions to the Moon and Mars. "Building on the legacy of previous space processors, this new multicore system is fault-tolerant, flexible, and extremely high-performing," said Eugene Schwanbeck, program element manager in NASA's Game Changing Development program at the agency's Langley Research Center, in Hampton, Virginia. "NASA's commitment to advancing spaceflight computing is a triumph of technical achievement and collaboration." Radiation Hardened Processor Faces Extreme Testing At the center of the project is a new radiation-hardened processor built to deliver up to 100 times the computing power of today's spaceflight computers while surviving the harsh environment of space. Engineers at NASA's Jet Propulsion Laboratory (JPL) in Southern California are running a wide range of tests designed to simulate those conditions. "We are putting these new chips through the wringer by carrying out radiation, thermal, and shock tests while also evaluating their performance through a rigorous functional test campaign," said Jim Butler, High Performance Space Computing project manager at JPL. To qualify for spaceflight, the processor must withstand intense electromagnetic radiation and dramatic temperature fluctuations that can damage electronics. High-energy particles from the Sun and deep space can also trigger computer errors that force spacecraft into "safe mode," temporarily shutting down nonessential systems until engineers resolve the issue. NASA is also testing how the chip handles the challenges of planetary landings. "To simulate real-world performance, we are using high-fidelity landing scenarios from real NASA missions that would typically require power-intensive hardware to process huge volumes of landing-sensor data," said Butler. "This is an exciting time for us to be working on hardware that will enable NASA's next giant leaps." Testing at JPL began in February and is expected to continue for several months. Early results have been highly encouraging. According to NASA, the processor is functioning as intended and has shown performance levels roughly 500 times greater than the radiation-hardened chips currently used in spacecraft. The team also marked the beginning of testing with a symbolic moment by sending an email titled "Hello Universe," referencing the famous introductory messages used during the early days of computer programming. AI Powered Spacecraft and Deep Space Missions The processor is being developed jointly by JPL and Microchip Technology Inc., based in Chandler, Arizona. The company is working with NASA through a commercial partnership, and sample chips have already been shared with defense and commercial aerospace partners. The technology is expected to play a major role in the future of autonomous spacecraft. With onboard artificial intelligence, spacecraft could respond to unexpected situations in real time when communication delays make human control impractical. The chip could also help deep space missions process, store, and transmit massive amounts of scientific data back to Earth more efficiently. NASA says the processor may eventually support crewed missions to the Moon and Mars as well. Small Processor With Massive Computing Power The device is known as a system-on-a-chip (or SoC), meaning it combines the essential components of a computer into a single compact unit. The processor includes central processing units, computational offloads, advanced networking systems, memory, and input/output interfaces. SoCs are widely used in smartphones and tablets because they are compact and energy efficient. However, NASA's version is designed to survive for years in deep space, potentially traveling millions (or even billions) of miles from Earth without maintenance or repairs. Once the processor is certified for use in space, NASA plans to integrate it into a wide variety of missions, including Earth orbiters, planetary rovers, deep space probes, and crewed habitats. The technology could also have benefits on Earth. Microchip plans to adapt the processor for industries such as aviation and automotive manufacturing. NASA and Industry Collaboration The project is managed by the Space Technology Mission Directorate's Game Changing Development (GCD) program at NASA Langley. The GCD program and JPL, which is managed by Caltech in Pasadena, California, oversaw the development process from mission planning and industry studies through final delivery. NASA JPL selected Microchip as a partner in 2022, and the company funded its own research and development work on the processor.
Microchip Technology has partnered with Sunny Smartlead, a global automotive camera module supplier and subsidiary of Sunny Optical Technology Group, to expand the Automotive SerDes Alliance Motion Link (ASA-ML) ecosystem. Sunny Smartlead is introducing Advanced Driver-Assistance Systems camera modules built on Microchip's VS700 family of ASA-ML devices. The collaboration combines Microchip's ASA-ML serialiser technology with Sunny Smartlead's camera expertise to help automotive manufacturers develop standardised ADAS camera solutions for Software-Defined Vehicles. ASA-ML technology features integrated security and timing capabilities, including link-layer authentication and precision time synchronisation across sensors. The partnership aims to create a production-ready, multi-vendor camera ecosystem around ASA-ML, offering an alternative to proprietary technologies. Sunny Smartlead's camera modules integrate Microchip's VS775S serialiser to support development within the ASA-ML ecosystem.
Everspin Technologies expands on-shore MRAM manufacturing capacity. Strategic manufacturing agreement with Microchip Technology to expand production capacity and strengthen long-term supply. Everspin Technologies Inc. announced its strategic manufacturing agreement with Microchip Technology, Inc. to expand production capacity and strengthen long-term supply.The company has entered into an initial 10-year agreement, that can be extended in 2-year increments, with Microchip Technology to augment its onshore manufacturing capacity for MRAM and Tunnel Magnetoresistive (TMR) sensor products. The firm will establish a copy exact (plus) MRAM line to manufacture MRAM and TMR sensor products currently produced at its line in Chandler, AZ. "Everspin is expanding its manufacturing footprint to support the next phase of MRAM adoption, as customers look for both long-term supply stability and higher-density, more capable solutions," says Sanjeev Aggarwal, president and CEO. "Our partnership with Microchip adds the production scale to support demand while continuing to advance our MRAM roadmap." Under the agreement, Everspin will stand up its industry magnetic technology and manufacturing process at a Microchip fabrication facility in Oregon. The company will retain ownership of the intellectual property and manufacturing process while utilizing Microchip's foundry services capacity. This expanded capacity will leverage Everspin's strong balance sheet and partnerships. "Microchip is pleased to collaborate with Everspin and provide foundry services from its large and expandable manufacturing capacity in our Oregon Fab," said Michael Finley, SVP, fab operations, Microchip'. The agreement will provide Everspin and its customers with several strategic benefits: * Increased wafer capacity to support growth plans * On-shore second source for MRAM and TMR sensor products * Continuity of supply lasting well into the next decade * Additional opportunities for Everspin to continue R&D programs advancing MRAM capabilities for next-gen use cases and workloads * International Traffic in Arms Regulations (ITAR) wafer processing capabilities The company will continue to manufacture MRAM and TMR sensor wafers in its Chandler, AZ facility co-located at NXP. The company plans to leverage its 20 years of MRAM production experience from Everspin's Chandler operation as a benchmark for process bring up at Microchip ensuring a timely and seamless process installation. The company expects the first products to ship from the Everspin-Microchip collaboration in the 2nd half of 2027. Read also: 64Mb xSPI STT-MRAM completes production qualification, and 128Mb and 256Mb xSPI STT-MRAM advancing through final qualification phases Read bandwidth of up to 400MB/s and write bandwidth of approximately 90MB/s, over 400 times faster than NOR flash, and write endurance up to 10 times higher than typical NOR AEC-Q100 Grade 1 MRAM delivers 10-year data retention at 125°C, 48-hour burn-in, and unlimited endurance for mission-critical systems Integrating Everspin's MRAM technologies with Quintauris' reference architectures and real-time platforms
Reference platform targets robust 10BASE-T1S Ethernet design. New Products | April 4, 2026 By Jens Nickel A new system-level reference design platform aims to accelerate adoption of Single-Pair Ethernet (SPE) in industrial and building automation applications. Developed through a collaboration between Arrow, Microchip, Bourns and Amphenol, the REF_SPE_T1S platform provides a practical evaluation environment for engineers transitioning from legacy fieldbus technologies to Ethernet at the edge. The platform addresses a key challenge in SPE deployment: ensuring signal integrity and electromagnetic compatibility (EMC) in electrically noisy environments. It also highlights the growing importance of magnetics design in achieving reliable Ethernet communication beyond the PHY layer. Magnetics design drives SPE performance The REF_SPE_T1S platform is built around Microchip's LAN8670 10BASE-T1S PHY and an IEC 63171-6 compliant SPE connector from Amphenol. At its core is an integrated magnetics solution from Bourns, combining an isolation transformer and common-mode choke (CMC) in a single component. The design demonstrates how the magnetic interface between PHY and cable plays a critical role in overall SPE performance. According to the developers, integrated transformer-based isolation significantly improves common-mode noise rejection and galvanic isolation, particularly at low frequencies - an area where capacitor-only isolation approaches can fall short. This enhanced noise suppression helps maintain signal integrity and stable connections in harsh industrial environments, where conducted and radiated interference can degrade communication reliability. The approach also improves emissions margins, supporting compliance with EMC requirements. Supporting the shift from fieldbus to Ethernet As industrial systems migrate away from legacy communication standards such as CAN and RS-485, SPE is emerging as a key enabler for Ethernet connectivity down to sensor and actuator level. The REF_SPE_T1S platform is positioned as a tool to support this transition by providing measurable insights into network robustness. The USB-powered evaluation board allows engineers to compare transformer-based isolation with capacitor-based designs in real time. It supports both point-to-point and multidrop 10BASE-T1S configurations, enabling validation of network stability and channel performance before finalising product designs. Target applications include industrial automation, HVAC and building control systems, as well as embedded edge devices requiring reliable, low-speed Ethernet connectivity. By offering a reference schematic and live testing environment, the platform is intended to reduce design risk and accelerate time-to-market for SPE-enabled products. Overall, the REF_SPE_T1S highlights how careful optimisation of the physical layer - including magnetics and isolation strategy - remains critical as Ethernet continues to expand into increasingly demanding edge environments. At the Arrow webpage developers can apply for samples. Linked Articles