C

ChipAgents

Agentic AI platform automates RTL design

IT Operations Lead

Full-TimeUpdated on 10/23/2026
$120k - $200k/yr+ Equity
Mid
San Jose, CA, USA
In Person
IT OperationsSystem Administration, IT Service Desk & End User Support

About the job

Requirements
  • Experience independently managing IT operations, systems administration, or employee technology support in a growing organization.
  • Hands-on experience administering business applications, user accounts, identity and access systems, and employee devices.
  • Strong troubleshooting skills across hardware, operating systems, applications, and networking.
  • Familiarity with device management platforms and practical endpoint security.
  • Working knowledge of office networking, including Wi-Fi, DNS, DHCP, VPNs, and firewalls.
  • A productivity-first approach to IT, evaluating tools and processes by how effectively they help people work and avoiding unnecessary approvals, restrictions, and manual steps.
  • Demonstrated judgment balancing security, reliability, and development speed, including adapting controls to the actual risk and needs of the team.
  • Clear communication, patience, and a service-oriented approach to helping technical and nontechnical colleagues.
  • Strong follow-through, including prioritizing competing requests, working independently, and recognizing when to bring in additional expertise.
Responsibilities
  • Administer business applications, accounts, permissions, and software licenses; simplify access, resolve configuration issues, and manage vendor support and renewals in partnership with relevant teams.
  • Own IT readiness for new hires, including equipment, accounts, application access, and setup guidance; coordinate timely access removal and equipment recovery when employees leave.
  • Own the lifecycle of employee laptops, workstations, and peripherals, from purchasing and provisioning through maintenance, replacement, and secure retirement; maintain accurate inventory and configurations that support each team’s work.
  • Serve as the primary contact for hardware, software, account, and connectivity issues; establish a support process, prioritize requests, communicate progress, and follow issues through resolution, coordinating with vendors or engineering when needed.
  • Configure and maintain office Wi-Fi, wired networks, network equipment, and meeting-room technology; troubleshoot connectivity issues and coordinate with service providers.
  • Keep accounts and devices secure and reliable through sensible defaults, automation, and low-friction maintenance; work with engineering to meet applicable security and compliance commitments while preserving developer productivity.
  • Evaluate the impact of proposed controls, explain tradeoffs, and find the least disruptive effective solution.
  • Automate repetitive administration, document common fixes, and build self-service resources to reduce approvals and manual steps.
  • Support engineering-led internal infrastructure work through provisioning, access administration, troubleshooting, and operational improvements.
Desired Qualifications
  • Experience building or improving IT processes at a startup.
  • Experience automating provisioning and administration using scripts, APIs, or workflow tools.
  • Familiarity with Linux, cloud platforms, and supporting engineering teams.
  • Experience supporting security audits through accurate records and lightweight, repeatable processes.

About the company

C

ChipAgents

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ChipAgents provides an agentic AI platform embedded in code editors to automate RTL design, debugging, and verification for semiconductors. It uses AI agents to generate RTL specifications from natural language, autocomplete Verilog, create testbenches, and autonomously verify code through simulations. The platform integrates with existing EDA workflows and targets hardware engineers to boost productivity, with early traction from 80 leading semiconductor companies. The goal is to shorten pre-silicon design cycles from weeks to days by automating repetitive tasks and enabling language-driven design and testing.

Company Size

11-50

Company Stage

Series A

Total Funding

$134.1M

Headquarters

San Jose, California

Founded

2024

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Simplify's Take

What believers are saying

  • ChipAgents said July 29, 2026, it deployed across 120 semiconductor companies and grew ARR 6x.
  • Andes Technology cut a verification workflow from months to three weeks using ChipAgents in 2026.
  • NVIDIA expanded its July 26, 2026 collaboration, reinforcing ChipAgents’ technical moat and distribution.

What critics are saying

  • Synopsys, Cadence, and Siemens EDA can bundle rival agents into existing design flows by 2027.
  • Micron and MediaTek are both investors and customers, creating concentration risk if deployments stall.
  • Autonomous chip-design agents face silicon-signoff liability; one bad bug can kill enterprise trust immediately.

What makes ChipAgents unique

  • ChipAgents targets RTL, verification, and debug, not generic coding assistants, as of 2026.
  • Renoir combines domain-specialized models with agent workflows across specs, waveforms, and EDA outputs.
  • William Wang’s UCSB lab roots and veteran advisors from Synopsys, Cadence, and Siemens sharpen domain credibility.

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Benefits

  • Unlimited Paid Time Off
  • Health Insurance
  • Dental Insurance
  • Vision Insurance
  • 401(k) Retirement Plan
  • 401(k) Company Match
  • Paid Vacation
  • Company Equity

Growth & Insights and Company News

Headcount

6 month growth

0%

1 year growth

20%

2 year growth

33%
StreetInsider
Oct 22nd, 2026
Rambus invests in ChipAgents and deploys its agentic AI chip design platform

Rambus has invested in ChipAgents and will use its agentic AI platform across its chip and silicon IP design and verification work. The companies announced a strategic partnership to bring agentic AI into chip design. Financial terms were not disclosed. The two will also offer combined capabilities to customers in their preferred design environments. ChipAgents, founded in 2024 and based in Santa Clara, California, converts specifications and code into production-ready design assets. "By adopting the ChipAgents platform, we see opportunities to accelerate the pace of chip and IP development, enhance engineering productivity, and strengthen our long-term position in AI and data-center infrastructure," said Luc Seraphin, president and chief executive officer of Rambus.

EE Times Asia
Oct 15th, 2026
SEMICON west 2026: NVIDIA expands GPU libraries for AI-driven semiconductor manufacturing.

SEMICON west 2026: NVIDIA expands GPU libraries for AI-driven semiconductor manufacturing. Article by: NVIDIA. NVIDIA and industry partners are applying accelerated computing and AI agents to chip simulation, process optimization, inspection and fab automation. NVIDIA has expanded its CUDA-X software portfolio to support AI-driven semiconductor design and manufacturing, with chipmakers and equipment suppliers adopting GPU-accelerated libraries for simulation, inspection and process optimization. The portfolio includes the new cuPotential library, which accelerates simulations of atomic and molecular interactions. NVIDIA said the tools will help engineers model materials, analyze inspection data and evaluate manufacturing changes before applying them to production. "The semiconductor industry made the AI revolution possible. Now, AI is transforming how chips are built," said Tim Costa, vice president and general manager of industrial and computational engineering at NVIDIA. "As fabs race to meet demand for advanced chips, NVIDIA CUDA-X and Omniverse libraries give AI agents accelerated simulation and inspection tools to help engineers manage complexity, improve yield and advance AI-defined fabs." CUDA-X targets semiconductor simulation The new cuPotential library provides GPU-accelerated functions for modeling electrical forces and other interactions among atoms. NVIDIA said early-access testing showed an additional 2-3x acceleration over existing GPU-optimized workflows. Synopsys is among the early adopters. Other CUDA-X libraries target different engineering workloads. cuEST models electronic behavior, while cuDSS accelerates complex engineering simulations. Synopsys is using the three libraries for semiconductor simulation. Early results showed a potential 30x speedup in QuantumATK using cuEST and a 12x speedup in S-Device using cuDSS. Its AgentEngineer solutions also work with NVIDIA Nemotron models and NeMo software to support AI agents for chip design and verification. Cadence is applying NVIDIA accelerated computing and AI models to electromechanical design, including semiconductor packaging and printed circuit boards. Its AuraStack AI Super Agent has optimized advanced packages for thermal and mechanical stress analysis up to eight times faster using cuDSS with Cadence Celsius. COMSOL is using cuDSS to accelerate multiphysics simulations for semiconductor equipment and process development, reporting up to 10x faster simulations. An upcoming COMSOL MCP Server will use NVIDIA's Nemotron Ultra model for AI-assisted modeling and design exploration. Voltai's Voltaire platform combines AI agents with GPU-accelerated solvers for 3D integrated-circuit design. The company said its approach can reduce electrothermal-mechanical simulation workflows from months to a day. ChipAgents is developing specialized AI models for chip design and working with NVIDIA on Build-A-Chip Bench, a benchmark for evaluating AI agents across workflows from specifications to graphic data system (GDS) output. Libraries support process modeling and lithography NVIDIA is also targeting manufacturing preparation and optimization. Its cuLitho library accelerates computational lithography, while NanoVDB supports processing of three-dimensional data and PhysicsNeMo provides a framework for training physics-based AI models. Siemens is using cuLitho to accelerate chip-pattern refinement and photomask preparation in its Calibre software. Its Solido team is also developing AI-driven characterization workflows using Nemotron models and NeMo libraries. Lam Research plans to integrate NanoVDB into SEMulator3D, its semiconductor process modeling platform. The company expects the addition to accelerate selected wafer-etch modeling workloads by up to 30x. Lam has also demonstrated PhysicsNeMo applications that reduce plasma-prediction simulation times from days to milliseconds. Luminary is using PhysicsNeMo to train models that predict temperature, pressure drop and thermal stress in semiconductor packages. The company said this approach allows engineers to explore 100 times more design configurations within the same schedule without running a separate simulation for each option. AI accelerates inspection and test For inspection and test, NVIDIA is promoting its NPP image-processing library and RAPIDS cuDF for GPU-accelerated data processing. Research institute imec is using NVIDIA computing to reduce noise in scanning electron microscope images for sub-nanometer chip measurements. It is also applying cuLitho to computationally intensive optical proximity correction, reporting a 30% improvement in the lithography process window. KLA has developed an NPP normalized cross-correlation kernel based on insights from its production software. The company reported performance up to 50 times faster than earlier CPU implementations, comparable with its hand-optimized versions. Teradyne is using NPP, RAPIDS cuDF and CuPy to accelerate test and maintenance workflows. The company reported approximately 85x faster probe-maintenance inference, which can help identify degrading probes before they affect yield. Advantest has integrated NVIDIA Nemotron and Kumo-Anomaly into its ACS RTDI platform for semiconductor production analytics. The system uses Grace Blackwell computing for real-time diagnostics and recommendations for corrective action in test cells. Advantest is also applying NeMo Switchyard AI agents to automate model selection and shorten test-workflow response times from hours to minutes. Digital twins extend AI into fab operations NVIDIA's technologies also support factory simulation and automation, where equipment data and digital models can help engineers evaluate process changes and production layouts. Applied Materials is using NVIDIA Omniverse and CUDA-X libraries, including cuDSS, cuEST and PhysicsNeMo, for materials discovery, process development and fab optimization. The company reported up to 35x faster chamber simulations and is developing fab digital twins to optimize layouts and material flow. Analog Devices is combining Synopsys physics simulation with NVIDIA Isaac Sim and Omniverse libraries to model sensor behavior in robotic systems. FANUC and Foxconn are connecting robot models to NVIDIA's Mega Omniverse Blueprint, allowing manufacturers to simulate and validate robotic operations in factory digital twins before deployment. OMRON is using NVIDIA Cosmos world models and the Metropolis Blueprint for video search and summarization in inspection equipment. Its work focuses on AI agents that combine visual data, equipment documentation and manufacturing knowledge to help engineers investigate printed circuit board defects and support troubleshooting and quality control.

MarketScreener
Oct 14th, 2026
ChipAgents collaborates with NVIDIA to launch Build-A-Chip-Bench for autonomous chip design and implementation.

ChipAgents collaborates with NVIDIA to launch Build-A-Chip-Bench for autonomous chip design and implementation. Published on 10/14/2026 at 02:50 pm EDT S&P Capital IQ ChipAgents introduced Build-A-Chip-Bench, a benchmark built in collaboration with NVIDIA designed to test whether AI agents can carry an end-to-end digital chip-design task from specification through physical implementation and verified GDS; thus, measuring true progress toward semiconductor design superintelligence. ChipAgents developed Build-A-Chip-Bench with NVIDIA to evaluate AI agents across the end-to-end digital IC design flow, from specification through physical implementation and verified Graphic Design System (GDS). Unlike point benchmarks focused primarily on RTL generation or verification, Build-A-Chip-Bench tests whether agents can meet functional, timing, power, area, and physical-verification requirements together. Build-A-Chip-Bench extends evaluation across the complete chip design flow, including architecture, microarchitecture, RTL, functional verification, logic synthesis, floor planning, placement, clock-tree synthesis, routing, timing and power signoff, and physical verification. Initial evaluations found that tested agents passed functional verification on ~40% of tasks on average, while only approximately 10% met the required physical performance, power and area (PPA) targets. The results illustrate an important distinction in AI-driven semiconductor design: generating functionally correct RTL is only one part of the engineering challenge. These results highlight the challenge of carrying functionally correct designs through physical implementation under the benchmark?s test conditions. Autonomous systems must also reason across abstraction levels, preserve validated behavior through revisions, operate specialized engineering tools and plan around expensive real-world physical feedback. Build-A-Chip-Bench is a benchmark developed by ChipAgents with technical expertise from NVIDIA on the benchmark suite and scoring rubric. It measures both functional correctness and the ability to meet downstream physical-design constraints. (C) S&P Capital IQ - 2026

Yahoo Finance
Oct 14th, 2026
ChipAgents and NVIDIA launch chip design benchmark: AI agents pass 40% of tests, only 10% hit PPA targets

ChipAgents, a Santa Clara startup building AI agents for semiconductor engineering, has launched Build-A-Chip-Bench with NVIDIA. The benchmark tests whether AI agents can take a digital chip design from specification through physical implementation and verified Graphic Design System (GDS) output. Existing tests largely stop at generating register-transfer level (RTL) code or verifying it. The new benchmark covers the full flow, and agents must meet functional, timing, power, area, and physical-verification requirements together. Initial results show a wide gap. Tested agents passed functional verification on about 40% of tasks, but only about 10% met physical performance, power and area targets. "The real challenge is carrying engineering intent through a long sequence of interconnected decisions," said William Wang, ChipAgents' founder and chief executive officer.

Associated Press
Sep 2nd, 2026
ChipAgents cuts Andes Technology processor design time by 30%, verification from 3 months to 3 weeks

ChipAgents, an agentic AI platform for semiconductor design, announced that Andes Technology has successfully deployed its solution across multiple processor design and verification projects. Andes reduced a processor customisation task from 8.5 weeks to six weeks, a 30% reduction in development time, whilst cutting a separate verification workflow from two to three months to approximately three weeks. The platform helped Andes customise a complex Memory Load-Store Unit, maintaining architectural correctness whilst accelerating timelines. ChipAgents also addressed verification bottlenecks, reducing Bus Interface Unit verification from months to weeks. Complex verification stimulus generation tasks that previously required one to two weeks were reduced to one to two days. As ChipAgents' first commercial customer, Andes has been a long-term co-innovation partner. Founded in 2024 and headquartered in Santa Clara, California, ChipAgents transforms specifications and code into production-ready RTL and verification assets.