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Rambus

Licenses high-speed chip-to-chip connectivity IP

Lead Member of Technical Staff Logic Design Engineer

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeVught, Netherlands

About the Job

Requirements

  • A BS or MS degree in Hardware Engineering, Computing Science, or a comparable level is required.
  • Eight or more years of experience in the security or chip industry in relevant engineering positions at R&D centers or system laboratories is required.
  • In-depth knowledge of SoC, Silicon IP, and/or FPGA logic design flows is required.
  • In-depth knowledge of hardware description languages, including Verilog, VHDL, and SystemVerilog, and scripting languages is required.
  • Strong written and verbal communication skills, including the ability to explain complex concepts to a technical audience, are required.
  • Good documentation skills in text and drawings are required.
  • Excellent analytical and creative problem-solving skills are required.
  • The candidate must be able and willing to work in a team-oriented, collaborative environment.
  • The candidate must be self-motivated and have a hands-on mentality.
  • The candidate must be able to prioritize and execute tasks to achieve goals in an innovative, fast-paced, and often high-pressure environment.

Responsibilities

  • Design and implement complex secure silicon IP.
  • Plan work by leading other digital designers, managing projects, and estimating effort.
  • Design block specifications and documentation, and encourage innovative ideas and patents for current and future products.
  • Perform RTL design, lint, clock domain crossing analysis, synthesis, and IP release.
  • Work with the verification team on planning and execution, simulation, debugging simulations, formal verification, technical reviews, and product documentation.
  • Contribute to flow and methodology development in an interdisciplinary R&D group that influences and guides the company's technical direction.
  • Interact with company technical leaders and senior staff in engineering, product management, sales, and field application engineering to support successful development of high-value products.

Desired Qualifications

  • Familiarity with IP integration, IP core delivery, and handoff issues is beneficial.
  • Ability to work with technical writers to produce technical documentation is beneficial.
  • In-depth knowledge of cryptography, security protocols, and security implementations is beneficial.
  • Knowledge of the PCIe IDE standard is beneficial.

About the Company

Rambus

Licenses high-speed chip-to-chip connectivity IP

Rambus designs, develops, and licenses high-speed chip-to-chip connectivity technology. Its IP powers data center servers, AI accelerators, and automotive systems, and is licensed to other semiconductor companies rather than manufactured and sold directly. The products are high-speed interfaces and security features embedded in chips, enabling fast, reliable communication between components. Rambus differentiates itself through a licensing-based model focused on advanced IP for memory, security, and high-speed interfaces across data centers, AI, and automotive markets, rather than relying on a traditional product lineup. The company’s goal is to enable high-performance chip communication at scale by monetizing its intellectual property through licensing and expanding into growing markets like data centers, AI, and automotive.

Company size
1,001-5,000
Company stage
IPO
Headquarters
San Jose, CA
Founded
1990

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