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Riverlane

Quantum software platform for fault-tolerant control

Hardware Engineer Intern

Silicon & ASIC DesignConfirmed live in the last 24 hours
Internship · Summer 2027Cambridge, UK£14.42 - £16.83 /hr

About the Job

Requirements

  • Applicants must be current students at the time of application, either in the second or a later year of a Bachelor's degree, partway through a Master's degree, or partway through a PhD.
  • Applicants must be studying Computer Science, Electronic Engineering, Physics, Mathematics, or another related technical subject.
  • Proficiency in Python is required.
  • A solid understanding of low-level computer architecture is required.
  • Applicants must be willing to learn about FPGA development, quantum computing, and quantum error correction.
  • Applicants must have the right to work in the UK for the full duration of the internship; UK student visa holders should check that their visa conditions permit this full-time internship.
  • Applicants must be available to work full-time for 10 to 12 weeks during the summer vacation period.

Responsibilities

  • Collaborate with experienced hardware and software engineers to investigate and evaluate architectural optimisations.
  • Enhance the decoder's architecture to improve its flexibility and processing speed.
  • Explore different design approaches and evaluate their potential benefits.
  • Contribute to design decisions involving space and time trade-offs, balancing functionality, resource use, and performance.
  • Communicate work through technical discussions, presentations, and written documentation.
  • Develop understanding of FPGA development, quantum computing, and quantum error correction.

Desired Qualifications

  • Experience with RTL development for FPGA or ASIC systems.
  • Familiarity with or interest in quantum computing.
  • Understanding of optimisation concepts and performance trade-offs.
  • Knowledge of networking principles.
  • Experience using version control, testing, or debugging tools.

About the Company

Riverlane

Quantum software platform for fault-tolerant control

Riverlane builds software to make quantum computers practical. It develops Deltaflow.OS, a universal operating system that runs on quantum hardware and manages real-time error detection and correction, providing a common software layer across different hardware platforms. This enables control of quantum devices and coordination of error-correcting processes, a key step toward scalable, fault-tolerant quantum computers. Riverlane differentiates itself by focusing on quantum error correction and hardware-agnostic software infrastructure, positioning Deltaflow.OS at the core of the quantum computing stack. The company collaborates with hardware developers, national laboratories, and governments to accelerate the move from experimental quantum devices to reliable, scalable machines.

Company size
201-500
Company stage
Grant
Total funding
$131.5M
Headquarters
Cambridge, United Kingdom
Founded
2016

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