C

Cisco

Makes networking gear and security software

ASIC Development Technical Leader

Silicon & ASIC DesignPosted on Nov 9
Full-timeVancouver, BC, CanadaIn-person

About the Job

Requirements

  • Bachelor’s degree in Electrical Engineering and 8+ years of Physical Design experience, or Master’s degree in Electrical Engineering and 6+ years of Physical Design experience, or PhD in Electrical Engineering and 3+ years of Physical Design experience.
  • Experience with RTL-to-GDSII flow and design tapeouts in 7nm, 5nm, 3nm, or smaller process technologies.
  • Experience using EDA tools such as Innovus, Tempus/PrimeTime, RedHawk/Voltus, or Calibre/Pegasus.
  • Proficiency in low-power design methodologies using UPF.
  • Experience using AI tools to improve productivity.

Responsibilities

  • Create full-chip floorplans by understanding design architecture, foundry integration guidelines, and IP placement constraints.
  • Collaborate with system and package design teams to understand requirements and incorporate them into full-chip floorplans.
  • Perform hierarchical implementation flows, including partitioning, pin assignment, clock planning, and bump planning; use full-chip clock mesh and Flex-HTree methods.
  • Perform RTL-to-GDSII implementation, including floorplanning, power-grid planning, place and route, static timing analysis, power integrity, physical verification, and equivalence checks, optimizing performance, power, and die size.
  • Analyze existing tool flows and methodologies, identify efficiency gaps, and implement incremental or transformative enhancements.
  • Work with RTL, DFT, implementation, EDA vendors, and tool/flow teams to enable design methodology.
  • Work with foundries and standard-cell IP vendors to define signoff methodologies and validate or adjust them based on feedback from Post-Silicon Validation teams.

Desired Qualifications

  • Experience with full-chip activities, including floorplanning, power-grid planning, partitioning, and pin assignment.
  • Experience with hierarchical design, timing closure, physical design convergence, and power integrity analysis.
  • Experience with static timing analysis concepts, defining timing constraints and exceptions, and corner and voltage definitions.
  • Experience with custom clock H-tree or mesh at chip level.
  • Experience with Python and using AI tools through accurate prompts.

About the Company

Cisco

Makes networking gear and security software

Cisco makes the switches and routers that connect offices, data centers, and cloud services, and it also sells cybersecurity tools and Webex video meetings to businesses and governments. It was one of the first companies to sell routers that let different kinds of computer networks exchange data, and in 2000 it briefly became the world's most valuable company. Customers run its network gear, from Wi-Fi access points to AI data center systems, with Cisco software that sets up and secures the network, while its Splunk unit searches computer logs to catch outages and attacks. Cisco earns money from hardware sales, software subscriptions, and support contracts. It was founded in 1984 and is based in San Jose, California.

Company size
10,001+
Company stage
IPO
Headquarters
San Jose, CA
Founded
1984

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