Applications Engineering Senior Staff Engineer
Synopsys
Applications Engineering Senior Staff Engineer
Synopsys
EDA software for chip design
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are:
You are an experienced Applications Engineer who brings deep technical credibility, strong customer instincts, and the ability to lead through complexity. With experience in design, verification, implementation, validation, or applications engineering, you have built strong expertise in ASIC Front-End or Back-End development and know how to guide customers through demanding integration challenges.
You combine analytical rigor, sound technical judgment, and clear communication to help customers move faster and make better engineering decisions. You are comfortable leading technical engagements independently, building trust with engineering teams, and partnering across functions to solve difficult problems.
You are excited about working with Synopsys’ UCIe (Universal Chiplet Interconnect Express) IP and the latest industry specifications across a range of market segments. In this role, you will help customers integrate UCIe IP throughout the SoC flow and support silicon and system bring-up. Some travel is required.
Open to candidates based near any Synopsys office in North America
What You’ll Be Doing:
The Impact You Will Have:
What You’ll Need:
Who You Are:
The Team You’ll Be A Part Of:
You will be part of a dynamic team focused on integrating leading-edge Interface IP (IIP) into ASIC SoC/systems for next-generation products. Our team collaborates closely with customers to provide UCIe IP integration guidance and support throughout their SoC flow. We work on the latest industry specifications/applications and contribute to the continuous improvement of Synopsys' IIP products.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.
Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.
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