ATE Test Manager / Senior Manager

As a Manager/Director of ATE Test Engineering, you will lead the development, validation, and deployment of test solutions for advanced RF, analog, and mixed-signal SoCs at indie Semiconductor.

You will build and scale a high-performing test engineering team while collaborating closely with design, product, and process engineering to ensure robust test coverage, high yield, and seamless integration into high-volume, automotive-grade manufacturing. Your deep expertise in V93000 test platforms, advanced technology nodes, silicon debug, and ATE infrastructure will directly shape product quality, production efficiency, and time-to-market across indie’s ADAS and Autotech portfolio.

This is a highly technical and impactful leadership role suited for an engineering leader who thrives in a fast-paced, innovation-driven environment.

The role reports to the EVP of Product and Test Engineering.

Location: Aliso Viejo, CA (hybrid)

JOB RESPONSIBILITIES

• Lead, mentor, and grow the Test Engineering team across junior, mid-level, and senior engineers, including resource allocation, performance management, and career development.
• Demonstrated track record of building and leading high-performing engineering teams, including hiring, mentoring, and performance management.
• Drive indie’s overall ATE test strategy, aligning test priorities with product roadmap and business objectives.
• Foster cross-functional collaboration with design, product engineering, foundry, and operations teams.
• Own and scale ATE development infrastructure, including hardware configuration management, tester scheduling, and lab capacity planning.
• Modernize automation infrastructure using AI-driven tools for test program management, including CI/CD pipelines for test code validation and release.
• Lead post-silicon validation and silicon bring-up efforts, owning debug, root cause analysis of circuit marginalities, and coordination with design and product engineering teams.

JOB REQUIREMENTS

• 10+ years of experience with a Master’s degree in Electrical Engineering or Computer Science.
• 5+ years experience managing a team of ATE Test Engineers.
• Deep hands-on experience with Advantest V93000 (93K) tester running SmartTest 8 (SMT8), including test program development, debug, tester bring-up, and cell-level infrastructure management in an advanced development center environment.
• Proven hands-on experience operating and owning lab environments, including managing physical test cell setups, load boards, and tester resources at scale.
• Strong understanding of digital, RF, and analog design fundamentals, as well as Design for Test (DFT) and manufacturing concepts.
• Demonstrated experience with advanced technology nodes, including RF SOI and FinFET processes for large-scale SoCs.
• Proficiency in scripting languages (e.g., Perl, Python) and high-level languages (e.g., C/C++ or Java), with strong programming skills for writing and debugging test programs and hardware-related issues.