Omni Design Technologies

Licenses high-performance IP cores for SoCs

Digital Design Manager

Engineering LeadershipConfirmed live in the last 24 hours

Full-timeHyderabad, Telangana, IndiaNo salary listed

About the Job

Requirements

A Bachelor of Science in Electrical Engineering is required.
At least 10 years of experience in RTL design and silicon verification is required.
At least 3 years of experience leading low-power mixed-signal system-on-chip design is required.
At least 10 years of experience specifying and designing field-programmable gate array architecture for high-speed serial protocols is required.
Experience with SoC, embedded central processing unit and bus architectures, networking, and control interfaces is required.
Experience with communications and digital signal processing algorithms and power- and area-efficient implementations is required.
Experience with digital integrated-circuit design, low-power and high-speed design, and design for test is required.
Experience with system modeling, register-transfer-level coding, lint and clock-domain-crossing checking, simulation, synthesis, power analysis, and timing analysis is required.
Experience with directed and constrained-random verification and Universal Verification Methodology is required.
Experience with embedded-systems FPGA emulation, laboratory debugging, and chip validation is required.
Experience with project planning, execution, and design tradeoffs targeting performance, power, die size, and schedule is required.
Experience working with architecture, physical design, and design teams to implement digital architecture is required.
Experience developing and refining digital microarchitecture specifications is required.
Experience working with analog/RF teams to develop, verify, and productize serializer/deserializer, clock-data-recovery, and phase-locked-loop/delay-locked-loop designs is required.
Strong analog/mixed-signal integrated-SoC development, hardware design, signal integrity, and SoC architecture, verification, and physical implementation knowledge is required.
Expertise in Verilog, SystemVerilog, C, C++, SystemC, and scripting languages such as Perl and Python is required.
Knowledge of wireless, mobile, and storage domains is required.
Strong analytical problem-solving, attention to detail, technical documentation, written and verbal communication, and interpersonal skills are required.
Experience in a startup environment is required.

Responsibilities

Manage, hire, and retain the digital engineering team.
Lead the SoC integration design team to develop and productize next-generation mixed-signal RF and communications SoCs.
Work with cross-functional teams to define product specifications, system architecture, hardware/software partitioning, and execution plans.
Implement SoC development practices and improve design methodology to maximize efficiency and predictability.
Deliver chip architecture, design, integration, programming model, and verification, and manage handoff to backend engineering.
Support silicon and system validation, system integration, and production testing.
Drive innovation and provide organizational leadership for system solutions and execution.
Lead implementation of the digital architecture and refine its microarchitecture specification.
Assemble the full-chip register-transfer-level design.
Evaluate intellectual-property blocks for licensing, including PCIe, LPDDR4, and JESD204C PHY.
Help develop built-in self-test capabilities.
Work with the verification team to develop full-chip simulation test suites and debug simulations.
Develop register-transfer-level state machines and interfaces.
Help resolve timing issues and work with physical-design engineers on signal-integrity issues.
Mentor and lead digital design engineers.
Work with systems and test engineering teams to validate parts and release them to production.

Desired Qualifications

A Master of Science in Electrical Engineering is preferred.
Senior management experience is preferred.
Experience with USB 3.0, DisplayPort, PCIe, or SATA-based silicon designs is preferred.

Omni Design is working on exciting solutions and chips for next generation automotive and space applications and looking for talented and capable engineers.

The Manager of digital and mixed-signal engineering will be responsible for development of mixed-signal SOC being developed at ODT and build the digital engineering team and will work Analog/RF engineering, FW engineering, verification, Systems Validation team, Operations, SOC Architects, and report to the Director of ASIC Engineering.

Roles and Responsibilities

Manage digital team, hire, and retain best talent
Lead SOC integration design team to develop and productize next generation mixed-signal RF/communication SOCs
Work with cross-functional project teams to define product specifications, system architecture, HW/SW partitioning, and execution plan
Implement best SoC development practices and improve design methodology to maximize efficiency and predictability
Deliver chip architecture, design, integration, programming model, verification, and manage hand-off to backend
Support Silicon and System Validation, support system integration, and production testing
Drive innovation and provides leadership to the organization to ensure world-class system solutions and flawless execution

Qualifications

BSEE Required, MSEE Preferred
Proven track record of success in high-performance/high-volume semiconductor industry
SoC, embedded CPU and bus architectures, networking, and control interfaces
Communications / DSP algorithms and power / area efficient implementations
Digital IC design, design for low power and high speed, design for test (DFT)
System modeling, RTL coding, Lint / CDC checking, simulation, synthesis, power analysis, timing analysis in Cadence / Synopsys design environments
Directed and constrained random verification, UVM methodology
Embedded systems FPGA emulation, lab debug and chip validation
Project planning and execution, and performing design tradeoffs to achieve performance, power, die size, and schedule targets
Self-motivated, excellent communication skills, and ability to excel and to provide leadership in a fast-paced environment
Senior Management experience preferred
Work with architecture, physical design, and design teams to lead the implementation of the digital architecture.
Develop and refine specification of the micro-architecture for the digital architecture.
Is in tune with industry trends and contributes to consistent roadmap decisions.

Experience

10+ years of experience in the area of RTL design and verification of silicon
At Least 3+ years experience in leading low-power mixed-Signal SOC design
10+ years of experience with FPGA architecture specification and design (Altera or Xilinx) for high-speed serial protocols, including USB-SS, PCIe, SATA/SAS, DisplayPort
Experience in leading, specifying, and work with Analog/RF team in developing, verifying, and productizing SERDES, CDR, and PLL/DLL designs
Experience with USB 3.0, DisplayPort, PCIe, or SATA based silicon designs preferred
Strong background in analog/mixed-signal integrated SOC Development
Strong Hardware design knowledge and familiarity with signal integrity
Strong foundation in SoC architecture, design, verification and physical implementation
Strong analytical problem solving, and attention to details
Knowledge of wireless, mobile, and storage domains
Expertise in Verilog/System Verilog, C/C++/SystemC, UVM, Scripting languages like Perl/Python, etc.
Excellent technical documentation skills
Excellent written and verbal communication skills
Excellent interpersonal skills, self-motivated, self-starter
Experience in startup environment

Expectations

Put the RTL for the Full chip together.
Evaluate the IP we have to license – like PCIe, LPDDR4, JESD 204C PHY
Help develop any BIST
Work with Verification Team to develop the FC Simulation test suites
Develop the RTL for the various state machines and interfaces
Run a few of the simulations
Help with the FC simulations debug
Help close the timing issues if any come up and work with the PD person to resolve any SI issues.
Be a mentor and lead a team of Digital design engineers
Work with Systems and Test engineering team to help validate the parts and release them to production

About the Company

Omni Design Technologies

Licenses high-performance IP cores for SoCs

Omni Design Technologies delivers high-performance, ultra-low power IP cores for mixed-signal SoCs that power devices across 5G, LiDAR, automotive networks, AI, image sensing, and IoT. It develops and validates IP blocks and licenses them to chip makers, offering customization and support to ensure seamless integration into customer designs. The cores are designed to work on FinFET processes down to 28nm, with proven silicon such as gigasample low-power ADCs and DACs on TSMC 28nm. The company differentiates itself through validated, silicon-proven IP, deep collaboration with customers and partners (e.g., LeddarTech, MegaChips), and a global design footprint (new Fort Collins design center). Its goal is to enable customers to build sophisticated, power-efficient, mixed-signal SoCs quickly by providing ready-to-license IP plus engineering services that fit their specific needs.

Company size: 51-200
Company stage: Series A
Total funding: $35M
Headquarters: Milpitas, CA
Founded: 2015

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