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Salience Labs

Photonic tensor processing for AI workloads

Lead Photonics Design Engineer - III/V Components

Hardware EngineeringConfirmed live in the last 24 hours
Full-timeNo salary listed

About the Job

Requirements

  • A PhD in physics, photonics, electrical engineering, optical engineering or a related subject with at least 6 years of relevant experience, or a Master's degree with at least 8 years of relevant experience, including at least 4 years of hands-on development of III-V optical amplifiers or semiconductor lasers, preferably in industry.
  • A proven track record of taking III-V devices from concept through design, fabrication and test, ideally including qualification.
  • Deep understanding of semiconductor laser and amplifier physics, including optical gain, carrier dynamics, quantum-well design, noise, gain saturation and nonlinearities, thermal effects and polarisation dependence.
  • Hands-on knowledge of III-V epitaxy and fabrication processes, such as MOCVD/MBE growth, lithography, etching, passivation, metallisation and facet/AR coating, and experience working with external foundries.
  • Experience characterising amplifiers or lasers, including optical spectrum analysis, gain and noise measurement, wafer-level probing, temperature-controlled testing and test automation.
  • Experience with simulation and layout tools for photonic devices, such as Lumerical, Photon Design, Crosslight, RSoft, COMSOL, KLayout, L-Edit or Cadence Virtuoso.
  • Proven ability to lead technical projects across design, process, test and packaging functions, and experience mentoring or supervising engineers.
  • Excellent communication skills, critical thinking, attention to detail and self-motivation.

Responsibilities

  • Lead the design and modelling of III-V active devices, including epitaxial layer structure, gain and power modelling, optical mode design, and electrical and thermal design.
  • Own the technology roadmap and device specifications for the area, translating system requirements into device design and integration targets.
  • Lead mask design and tape-outs, including GDS layouts, test structures and design-of-experiment splits.
  • Manage fabrication runs with external epitaxy and foundry partners by defining process flows, reviewing process and in-line data, and resolving yield issues as the technology scales.
  • Define and lead the characterisation strategy at wafer, chip and integrated-PIC level, including building and automating test setups.
  • Analyse test data, correlate measured performance with design and process variations, and drive design iterations to close performance gaps.
  • Work with packaging and reliability engineers on burn-in, accelerated ageing, failure analysis and qualification.
  • Mentor engineers and, as the team grows, help recruit and develop new team members.

Desired Qualifications

  • Experience integrating III-V active devices with silicon photonics, including coupling design between III-V and silicon waveguides.
  • Experience line-managing a technical team.
  • Experience with reliability testing and failure analysis of III-V devices.
  • Experience developing PDK building blocks or compact models for active devices.
  • Programming experience with Python, MATLAB or C++ for simulation, test automation and data analysis.
  • Knowledge of photonic packaging, including fibre coupling, thermal design and TEC control.
  • A track record of high-quality patents and research papers.

About the Company

Salience Labs

Photonic tensor processing for AI workloads

Salience Labs designs and builds photonic-based processors to boost AI computing power while reducing energy use. Its main product is a massively parallel, ultra-high-throughput tensor processing chip that uses light for computation, aiming to overcome bottlenecks in data transfer and processing that limit traditional electronic AI chips. The chip, built with silicon photonics, enables faster AI workloads by performing tensor operations in the optical domain, improving bandwidth and efficiency for data centers. Compared with electronic AI hardware, Salience Labs focuses on photonics to deliver higher throughput and lower power per operation, targeting AI and data center customers with specialized chip design and manufacturing. The company’s goal is to enable scalable, energy-efficient infrastructure to support larger and more capable AI models and workloads.

Company size
51-200
Company stage
Series B
Total funding
$170.6M
Headquarters
Milton, United Kingdom
Founded
2020

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