Volantis Semiconductor

Designs photonic AI compute hardware

Link Validation Engineer

Hardware Validation & TestingConfirmed live in the last 24 hours

Full-timeNo salary listed

About the Job

Requirements

Hands-on experience with the bringup and design verification test process for optical links and physical-layer systems.
Deep understanding of electrical and optical physical-layer systems and optical links, including TDECQ, jitter, and bit error rate.

Responsibilities

Contribute to design verification testing and bringup of the core optical link and physical layer.

Desired Qualifications

Experience with clock-forwarded optical links.
Experience with copper serial-deserializer system bringup as well as optical physical-layer system bringup.
Experience with wide-and-slow optical architectures.

What We’re Looking For:

We’re looking for link validation engineers to help with DVT and bringup of the core optical link and PHY.

Ideal Background:

Ideal candidates for this role should have:

Hands-on experience with the bringup and DVT process of optical links and PHYs
Deep understanding of both PHY systems (both electrical and optical) and optical links (TDECQ, jitter, BER, etc)
Hands-on experience with contributing to the design process of PHYs and ideally electro-optic PHYs

Nice to Have:

Experience with clock forwarded optical links
Experience with both copper SERDES system bringup as well as optical PHY system bringup
Experience with wide and slow optical architectures

About the Company

Volantis Semiconductor

Designs photonic AI compute hardware

Volantis Semiconductor designs photonic computing hardware for AI workloads, centered on the Volantis Photonic Motherboard. Its technology directly modulates low-cost VCSELs and densely parallel optical waveguides directly on the chip to replace electrical interconnects, enabling a chip-scale package with massive bandwidth and energy efficiency. This approach differs from traditional silicon photonics by wafer-scale integration and laser-based optics, focusing on scalable interconnect bandwidth and compute efficiency rather than simply adding more silicon cores. The company aims to deliver faster, cheaper AI compute with reduced energy use, with pre-orders expected in early 2026 as it engages early customers.

Company size: 11-50
Company stage: Series A
Total funding: $97M
Headquarters: San Mateo, CA
Founded: 2022

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