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GlobalFoundries

Semiconductor foundry delivering specialized chips

Quantum TSV Integration Engineer

Full-TimeUpdated on 10/23/2026
$98k - $176k
Senior, Expert
Master's, PhD
Malta, NY, USA
In PersonTravel up to 20%.
Manufacturing & Process EngineeringProcess Engineering
Company Does Not Provide H1B Sponsorship

About the job

Requirements
  • A master's degree in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Materials Science, or a related field from an accredited degree program.
  • At least 8 years of prior related work experience with an MS degree.
  • An overall GPA of at least 3.0 and proven good academic standing.
  • Fluency in written and spoken English.
  • Willingness to travel up to 20%.
Responsibilities
  • Lead development of through-silicon via (TSV) processes for cryogenic and superconducting applications.
  • Define TSV architectures, including superconducting liners, dielectric isolation schemes, and via geometries such as diameter, depth, and pitch.
  • Ensure TSV designs are optimized for low-loss electrical and radio-frequency signal transport and cryogenic thermal and mechanical stability.
  • Own end-to-end TSV integration flows across via etch, liner deposition, dielectric, and metallization; wafer thinning, reveal, and backside processing; and integration into 2.5D/3D packaging stacks.
  • Drive process integration planning to enable prototyping and qualification across programs.
  • Develop TSV solutions for superconducting interposers and 3D integration platforms.
  • Support integration with bump/interconnect layers, redistribution routing layers, and assembly and bonding flows.
  • Ensure TSVs enable high-density vertical interconnects for quantum system scaling.
  • Enable prototype builds and development lots, ensuring smooth execution through fab and assembly flows.
  • Support transition from research and development to pilot and manufacturable flows.
  • Collaborate with device and test teams to ensure TSVs meet cryogenic electrical performance requirements, including direct current and radio-frequency/microwave performance, low resistance, and minimal loss for superconducting operation.
  • Support characterization of signal integrity, including noise and crosstalk, and thermal leakage across vias.
  • Develop strategies to improve TSV yield and process robustness and integration reliability under cryogenic conditions.
  • Identify and analyze failure modes such as liner defects or discontinuities, delamination or cracking during thermal cycling, and void formation or via integrity issues.
  • Lead root-cause analysis and corrective actions.
  • Work closely with materials teams to select TSV liner and dielectric materials compatible with superconducting operation and understand cryogenic behavior, including coefficient of thermal expansion mismatch, stress, and superconductivity limits.
  • Optimize interface integrity between the via liner, dielectric, and substrate.
  • Define requirements for TSV-specific process tools, including deep silicon etch, conformal deposition, and wafer thinning and reveal.
  • Collaborate with equipment vendors and suppliers to develop new capabilities.
  • Support qualification of new tooling and materials.
  • Interface across interconnect teams, assembly and integration engineers, and device, qubit, and system engineers.
  • Ensure co-optimization of TSVs with the full packaging stack.
  • Drive development of next-generation TSV scaling, including smaller diameters, higher aspect ratios, and alignment with micro-bump pitch scaling.
  • Contribute to the cryogenic 3DHI roadmap and APPC capability build-out.
  • Evaluate novel via concepts, including superconducting-lined, partially filled, or air-gap vias.
  • Generate TSV integration flows, specifications, design rules, and process documentation.
  • Provide technical updates, reports, and data-driven insights.
  • Contribute to intellectual property, publications, and conference outputs.
  • Perform activities safely and responsibly and support Environmental, Health, Safety and Security requirements and programs.
  • Take part in hiring other Advanced Packaging team members in Singapore.
  • Mentor and guide new hires to assume their roles and responsibilities.
  • Perform other duties as assigned by the manager.
Desired Qualifications
  • A PhD, with at least 5 years of prior related work experience.
  • Demonstrated prior leadership experience in the workplace, school projects, competitions, or similar settings.
  • Project management skills, including the ability to innovate and execute on solutions that matter and navigate ambiguity.
  • Strong written and verbal communication skills.
  • Strong planning and organizational skills.

About the company

GlobalFoundries is a semiconductor foundry that manufactures chips for a broad range of customers, focusing on feature-rich, reliable technologies for cars, IoT, 5G, and other high-growth markets. It operates by fabricating silicon wafers for customer designs, offering mature, specialized processes rather than chasing the most advanced nodes. This makes it different from peers that prize the latest process nodes; GlobalFoundries emphasizes diversification across a global manufacturing footprint (U.S., Europe, Singapore) and stable supply for essential applications. Its goal is to be a leading supplier of high-volume, specialty manufacturing that enables reliable chips for everyday devices and growing tech markets.

Company Size

10,001+

Company Stage

IPO

Headquarters

Town of Malta, New York

Founded

2009

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Simplify's Take

What believers are saying

  • Marvell expanded SiGe capacity on September 17, 2026, signaling demand through 2027.
  • Commerce finalized a $375 million R&D award on September 8, 2026, plus a July $300 million framework.
  • SMART Photonics partnered with GF on September 21, 2026, widening its photonics platform and customer funnel.

What critics are saying

  • Smart mobile is 36% of revenue, and management expects low-teens decline in 2026.
  • Tower Semiconductor litigation in Texas and the ITC risks injunctions, distraction, and patent retaliation.
  • If AI photonics demand normalizes before 2027, GF's growth story reverts to commoditized mature-node fabs.

What makes GlobalFoundries unique

  • GlobalFoundries abandoned bleeding-edge nodes in 2018, specializing in feature-rich chips for autos and connectivity.
  • Its Malta, Burlington, Dresden, and Singapore footprint sells trusted regional supply to governments and enterprises.
  • GF owns uncommon SiGe, silicon photonics, and FDX process depth for optical and edge chips.

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Benefits

  • Professional Development Budget

Growth & Insights and Company News

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Yahoo Finance
Oct 15th, 2026
US doubles GlobalFoundries stake to about 8% in deal with up to $21B Japan-backed chip plants

The US government has doubled its equity stake in chipmaker GlobalFoundries to nearly 8%, President Donald Trump announced Wednesday. He said the stake is now "worth over 2 Billion Dollars" in a company with a market capitalisation of about $27.2 billion. The deal reallocates a $955 million award under the 2022 Chips and Science Act toward modernising the company's facilities. GlobalFoundries said the government is taking an additional stake of about 4%. A new vehicle co-owned by the US and Japanese governments will fund two fabrication plants, described as "up to $21 billion" in investment, with about $10 billion initially. GlobalFoundries will build and operate them, and expects about $3 billion in compensation over the next decade. The first plant is due online in 2029, the second in 2031.

Guggenheim Partners
Oct 14th, 2026
GlobalFoundries selected to operate two new semiconductor fabs in New York under landmark U.S.-Japan initiative | GlobalFoundries

GF has been selected as the technology provider and operator for two new fabs at its Malta, New York, site under a U.S.-Japan initiative.

Sohu
Oct 14th, 2026
GlobalFoundries to build two New York chip plants with up to $21B from Japan, US to take 4% stake

GlobalFoundries will build two new chip factories at its existing site in upstate New York, according to a deal announced on October 14. Japan's government will provide up to $21 billion in funding. The US government will buy about 4% of the company's shares. The two plants will be jointly held by the US and Japan. The new factories will make basic chips, reducing reliance on suppliers in East Asia.

Bloomberg
Oct 14th, 2026
GlobalFoundries to build two chip plants with up to $21B in Japanese backing

GlobalFoundries Inc. plans to build two new chip plants with backing of as much as $21 billion from the Japanese government. The arrangement is part of a US-Japan deal that also includes the US taking a 4% stake in the company.

Yahoo Finance
Oct 8th, 2026
TSMC signs $2B deal with GlobalFoundries for AI chip silicon interposers at New York plant

GlobalFoundries shares rose nearly 6% Thursday after announcing a $2 billion manufacturing deal with Taiwan Semiconductor Manufacturing Company to produce silicon interposers at its New York facility. The five-year agreement will support expanded manufacturing capacity, with volume production expected to begin in the first half of 2028. The facility is set to become the first US-based source of silicon interposers for advanced packaging technologies. These components are crucial for TSMC's Chip-on-Wafer-on-Substrate technology, which connects AI processors with high-bandwidth memory. The deal addresses constraints in TSMC's CoWoS packaging capacity, which has become a bottleneck for AI chip production. Counterpoint Research estimates the supply-demand gap could remain around 20% in 2026 before narrowing to roughly 10% in 2027.