Internship

Design Engineer Intern

Confirmed live in the last 24 hours

Cadence Design Systems

Cadence Design Systems

10,001+ employees

Provides EDA software and IP solutions

No salary listed

San Jose, CA, USA

Category
Electronics Design Engineering
Embedded Systems Engineering
Electrical Engineering
Required Skills
VLSI Design
Verilog
Python
JavaScript
Perl
Requirements
  • Completed foundational coursework in Digital IC design, Computer Architecture, and VLSI design
  • Exposure to VLSI design tools including Genus Synthesis, Innovus P&R and Tempus Static Timing Analysis flows
  • Proficiency in one or more programming languages including Tcl, Python, Perl & JavaScript
  • Enrollment in MS or PhD level program
  • Background in RTL design including Verilog, synthesis, lint, formal
  • Strong communication skills
  • Scripting language experience a plus
Responsibilities
  • Work with the Physical Design CAD team and R&D to adopt latest capabilities to optimize the PPA for next generation of IPs
  • Work on designing IPs on multiple generations of foundry technologies to deliver the best-in-class PPA for each technology node
Desired Qualifications
  • Scripting language experience a plus
Cadence Design Systems

Cadence Design Systems

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Cadence Design Systems provides software, hardware, and intellectual property (IP) for the electronic design automation (EDA) industry, focusing on the design of advanced semiconductor chips and electronic systems. Their products include tools for system design, verification, integrated circuit design, and custom and analog design. Additionally, they offer IP solutions like Tensilica processors and digital signal processors (DSPs) that are utilized in various applications, including AI, machine learning, and multimedia processing. Cadence differentiates itself from competitors through its strong emphasis on continuous innovation and collaboration with industry leaders, ensuring they remain at the forefront of the EDA market. The company's goal is to support a wide range of clients, from semiconductor manufacturers to educational institutions, by providing comprehensive solutions that enhance the design and verification processes in electronics.

Company Size

10,001+

Company Stage

IPO

Headquarters

San Jose, California

Founded

1988

Simplify Jobs

Simplify's Take

What believers are saying

  • Growing AI demand boosts need for Cadence's advanced EDA tools.
  • Automotive industry's shift to electric vehicles opens opportunities for Cadence's design solutions.
  • 5G network expansion increases demand for Cadence's RF and mixed-signal design tools.

What critics are saying

  • Emerging EDA companies using AI may threaten Cadence's market share.
  • Global semiconductor shortage could reduce demand for Cadence's design tools.
  • Geopolitical tensions may disrupt Cadence's operations and supply chain.

What makes Cadence Design Systems unique

  • Cadence leverages over 30 years of computational software expertise in electronic design.
  • The company offers a comprehensive suite of EDA tools for semiconductor and system design.
  • Cadence's Tensilica processors and DSPs cater to AI, audio, and video processing needs.

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Benefits

Health Insurance

Dental Insurance

Life Insurance

Flexible Work Hours

Paid Vacation

Paid Sick Leave

Company News

Le Lézard
Apr 4th, 2025
Cadence Announces First Quarter 2025 Financial Results Webcast

In 2024, Cadence was recognized by the Wall Street Journal as one of the world's top 100 best-managed companies.

Business News Wales
Apr 4th, 2025
Business Leaders Call for Export Support as Welsh Government Pledges Wales-US Relationship Will 'Continue to Prosper'

"Last month the Minister for Culture, Skills and Social Partnership led a delegation of Welsh creative companies to the 2025 Games Development Conference in San Francisco and we also announced plans from the US semiconductor design software leader Cadence Design Systems, Inc. to open a new design centre in Cardiff, creating more than 100 highly skilled jobs.

PYMNTS
Apr 3rd, 2025
Intel’S New Ceo Vows To Reform Outdated Development Model

Intel’s new CEO, Lip-Bu Tan, is clear-eyed about the chipmaker’s many problems and the tough road ahead as he engineers a turnaround to revive this legendary Silicon Valley company. “This is an iconic and essential company that is important for the industry and also to the United States,” Tan said in a keynote address at [] The post Intel’s New CEO Vows to Reform Outdated Development Model appeared first on PYMNTS.com.

Travel and Tour World
Mar 26th, 2025
Cadence, Spotnana Partner to Revolutionize Corporate Travel in the U.S., Enhancing Business Travel Programs with Modern Technology and Concierge Support

Cadence, a Forbes-endorsed travel agency with 30 years of expertise, has announced an exciting new partnership with Spotnana, a leading provider of cutting-edge travel infrastructure.

Business Travel News
Mar 26th, 2025
TMC Cadence Taps Spotnana as Tech Partner

Travel management company Cadence has partnered with Spotnana to make Spotnana's travel platform technology available to Cadence clients and agents, the companies announced.