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Synopsys

EDA software for chip design

Applications Engineering Principal Engineer

Implementation & Technical Account ManagementConfirmed live in the last 24 hours
Full-time

About the Job

Requirements

  • BSEE/BSCE or MSEE/MSCE with 10+ years of experience, or equivalent experience with a focus on VLSI design.
  • Experience in design, verification, or application engineering.
  • Proficiency in RTL coding using Verilog and/or VHDL.
  • Experience with high-speed protocols such as Ethernet, DDR, and PCIe.
  • Hands-on experience with simulation, synthesis, and static timing analysis.
  • Familiarity with UNIX environments and ASIC/SoC tape-out processes.
  • Ability to solve complex issues independently and collaborate across teams and with customers.
  • Clear verbal and written communication.
  • Ability to manage multiple priorities in a dynamic, customer-facing environment.
  • Willingness to travel occasionally in support of customer engagements.

Responsibilities

  • Support Interface IP customers with integration across the SoC design flow.
  • Provide technical guidance to resolve integration, implementation, and debugging challenges.
  • Assist with technical reviews at key milestones and help customers work through issues efficiently.
  • Support silicon and system bring-up, including hands-on debugging of critical issues.
  • Partner with R&D, product teams, and field teams to deliver solutions aligned to customer requirements.
  • Stay current on evolving industry standards, protocol requirements, and application trends across key market segments.
  • Support customer engagements through occasional travel, including on-site technical collaboration and bring-up activities.

Desired Qualifications

  • Knowledge of CDC, RDC, lint, DFT, STA, and LEC.

About the Company

Synopsys

EDA software for chip design

Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.

Company size
10,001+
Company stage
IPO
Headquarters
Sunnyvale, CA
Founded
1986

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