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AMD

Designs chips for computers and AI systems

Chip Lead / ASIC Director

Engineering LeadershipConfirmed live in the last 24 hours
Full-timeSan Jose, CA, USANo salary listedIn-person

About the Job

Requirements

  • The position requires a wide breadth of understanding of and experience with ASIC design and development.
  • The candidate must have strong interpersonal skills to resolve issues between highly skilled and experienced engineering colleagues.
  • The candidate should be attuned to overall program goals and objectives and have communication and problem-solving skills.
  • Experience in the ASIC development lifecycle is required.
  • A Master's or PhD in Electrical Engineering, Computer Engineering, or a related technical field is listed as preferred experience.
  • A Bachelor's or Master's degree in a related discipline is listed as a preferred academic credential.

Responsibilities

  • Provide technical leadership to one or more Adaptive & Embedded Computing Group device programs, with sign-off responsibility for technical execution from conception and planning through release to manufacturing.
  • Provide problem-solving leadership across the device development cycle, including architecture, RTL, analog and custom design, design for test and manufacturing, verification, physical design and timing closure, physical verification, tapeout, and post-silicon validation and qualification.
  • Coordinate solutions for problems that do not clearly fall under one technical team.
  • Identify critical tradeoffs and architectural decisions during chip definition and feasibility.
  • Advise on feasibility, including early estimates of schedule, cost, size, power, and floorplan, and identify key implementation decisions.
  • Serve as Engineering's interface to Technical Marketing, ensuring the product meets customer needs and supports required functions and usage modes.
  • Define or identify new device-specific functionality with Marketing and Architecture.
  • Negotiate for a new IP, a new IP version, or an IP variant when needed, in coordination with the IP/COE Lead.
  • Promote engineering reuse by staying aware of devices and programs throughout the organization.
  • Help resolve issues and guide tradeoffs during any program phase, especially in Physical Design.
  • Work with one or more Program Managers who track IP and chip development milestones and deliverables; engage and resolve problems when program objectives are not being met.
  • Communicate program changes and their consequences to all stakeholders when Engineering or Marketing initiates a change.

Desired Qualifications

  • FPGA technical experience is a significant plus.
  • Experience in a leadership role with a semiconductor company is preferred.
  • Post-silicon validation experience is a strong asset.
  • A strong understanding of the semiconductor industry and its products is preferred.
  • Experience working with Product Planning and Marketing teams is preferred.

About the Company

AMD

Designs chips for computers and AI systems

AMD designs processors, graphics chips and AI accelerators for computer makers, cloud operators and businesses that build electronic devices. Its Ryzen processors power personal computers, while EPYC processors handle work in data centers and Radeon chips render graphics. Instinct accelerators run AI models, paired with software that developers use to train models and put them into production. AMD sells chips and related computing systems through equipment makers, distributors and retail channels, and contracts with outside foundries to fabricate its semiconductor designs. It was founded in 1969 and has its headquarters in Santa Clara, California.

Company size
10,001+
Company stage
IPO
Headquarters
Santa Clara, CA
Founded
1969

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