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FuriosaAI

Power-efficient AI inference accelerator chips

Hardware – Silicon Validation Engineer - NPU SoC

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeSeoul, South KoreaNo salary listedIn-person

About the Job

Requirements

  • Experience in SoC, ASIC, or complex silicon validation or system validation; lead-level candidates must have relevant leadership experience or equivalent senior experience.
  • Strong knowledge of ARM architecture, AMBA buses such as AXI and AHB, and overall SoC or computer architecture.
  • Embedded C/C++ and Rust programming ability for hardware control and IP testing, including bare-metal development experience.
  • Understanding and experience with structured validation methodology, from test planning and bug tracking through coverage management.
  • Ability to use JTAG debuggers such as Trace32 and perform hardware/software co-debugging.
  • Ability to logically analyze, persistently investigate, and resolve complex system issues.

Responsibilities

  • Lead first-silicon bring-up for NPU accelerator cores, CPU subsystems, NoC blocks, memory subsystems such as LPDDR and HBM, and high-speed interfaces such as Ethernet; perform scenario-based functional validation, board bring-up, and system initialization including boot sequences and clock/reset configuration.
  • Establish and execute validation plans in pre-silicon environments such as emulators and FPGA and in post-silicon environments, manage coverage, and develop bare-metal test firmware and scenarios for IP validation.
  • Analyze complex issues arising at the hardware (RTL) and software (firmware/driver) boundary using tools such as JTAG and Trace32, derive workarounds, and report findings to relevant teams.
  • Support performance validation and optimization of NPU data-processing pipelines and memory bandwidth.
  • Write test automation scripts and build a validation environment integrated with CI/CD.

Desired Qualifications

  • Experience validating or bringing up AI accelerators such as NPU or TPU, GPUs, or complex multicore SoCs.
  • Experience with validation in pre-silicon environments such as Palladium, Zebu, or FPGA.
  • Understanding of protocols and controller behavior for high-speed interfaces such as Ethernet, CXL, LPDDR, and HBM.
  • Understanding of Linux kernel and device-driver operation.
  • Experience actively using Rust in system-level software development.
  • Experience building validation automation environments with scripting languages such as Python, Tcl, and Bash.

About the Company

FuriosaAI

Power-efficient AI inference accelerator chips

FuriosaAI develops AI accelerators for data centers. Its flagship RNGD chip is a power-efficient accelerator designed to boost performance per watt for running large language models and other demanding AI workloads. The hardware is configurable with multiple processing elements to fit different workloads, and it is paired with advanced compiler technology and profiling tools to identify bottlenecks and optimize efficiency. This combination of flexible hardware and software optimization differentiates FuriosaAI from competitors, focusing on maximizing performance while keeping energy use low. The company targets data centers and enterprises that need high-performance, energy-efficient AI solutions, and aims to make AI computing more sustainable and scalable by selling its chips and related software tools and pursuing long-term contracts with large-scale customers.

Company size
201-500
Company stage
Series D
Total funding
$887.5M
Headquarters
Seoul, South Korea
Founded
2017

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