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Synopsys

EDA software for chip design

High-Speed PHY IP Applications Engineering Principal Engineer

Implementation & Technical Account ManagementConfirmed live in the last 24 hours
Full-timeSouth KoreaNo salary listed

About the Job

Requirements

  • Bachelor's or Master's degree in Electrical Engineering or Computer Engineering.
  • 10 to 20+ years of ASIC design, verification, or SoC integration experience.
  • Strong working knowledge of synthesis, static timing analysis, design-for-test, and clock domain crossing.
  • Ability to work independently and drive ambiguous, customer-driven issues to resolution.
  • Excellent communication skills in Korean and English, with the ability to explain complex concepts clearly.
  • Willingness to travel occasionally within Korea and the region.

Responsibilities

  • Provide technical support to customers integrating DesignWare USB Mixed Signal PHY IP, from initial integration through silicon bring-up and debug.
  • Troubleshoot customer issues across synthesis, static timing analysis, design-for-test, and clock domain crossing in USB PHY and SoC integration contexts.
  • Guide customers through USB 2.0, USB 3.x, and Type-C implementation considerations and design tradeoffs, and help define bring-up and debug plans that reduce time-to-silicon.
  • Collaborate with the Korea applications engineering team and Synopsys research and development and product teams to escalate complex issues, drive root-cause analysis, and ensure timely closure during critical milestones.
  • Contribute to customer support for other high-speed interface PHY IP, including MIPI, PCIe, and HDMI, in collaboration with colleagues; DDR is excluded.
  • Deliver technical presentations and integration best practices to customer engineering teams during design reviews and key program checkpoints.
  • Travel occasionally to customer sites across Korea and the region to support critical milestones.

Desired Qualifications

  • USB 2.0, USB 3.x, Type-C, or USB PHY integration experience.
  • A broader high-speed interface background, such as MIPI, PCIe, or HDMI, to support collaborative cross-IP coverage.

About the Company

Synopsys

EDA software for chip design

Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.

Company size
10,001+
Company stage
IPO
Headquarters
Sunnyvale, CA
Founded
1986

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