C

Cisco

Makes networking gear and security software

ASIC DFT Engineering Technical Leader - Multiple Teams

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeNo salary listed

About the Job

Requirements

  • A bachelor's or master's degree in Electrical Engineering or Computer Engineering and at least 12 years of experience are required.
  • Knowledge of current trends in design-for-test (DFT), testing, and silicon engineering.
  • Experience with JTAG protocols, scan and built-in self-test (BIST) architectures, including memory BIST and boundary scan.
  • Experience with automatic test pattern generation (ATPG) and electronic design automation tools such as TestMax, TetraMAX, Tessent, and PrimeTime.
  • SystemVerilog verification skills, including logic-equivalence checking and validating design test timing.
  • Experience with gate-level simulation and debugging using VCS or other simulators.
  • Post-silicon validation and debugging experience, including ability to work with automatic test equipment (ATE) patterns and P1687.
  • Scripting skills in Tcl and Python or Perl.
  • Strong verbal skills and ability to thrive in a multifaceted environment.

Responsibilities

  • Implement hardware design-for-test (DFT) features that support automatic test equipment (ATE), in-system testing, debugging, and diagnostics needs of the designs.
  • Develop innovative DFT intellectual property in collaboration with multifunctional teams and contribute to full-chip design integration with testability features coordinated in RTL.
  • Work with design, design-verification, and physical-design teams to integrate and validate test logic throughout implementation and post-silicon validation flows.
  • Participate in creating hardware DFT and physical-design aspects for new silicon device models, bare die, and stacked die, and drive reusable test and debugging strategies.
  • Drive the DFT and quality process throughout the implementation flow and post-silicon validation phases, with exposure to physical-design signoff activities.
  • Work with front-end RTL and back-end physical-design teams to understand chip architecture and define DFT requirements early in the design cycle.
  • Craft solutions and debug with minimal mentorship.

Desired Qualifications

  • Verilog design experience, including developing custom DFT logic and integrating intellectual property, and familiarity with functional verification.
  • DFT computer-aided design (CAD) development experience in test architecture, methodology, and infrastructure.
  • Test static timing analysis experience.
  • Post-silicon validation using DFT patterns.

About the Company

Cisco

Makes networking gear and security software

Cisco makes the switches and routers that connect offices, data centers, and cloud services, and it also sells cybersecurity tools and Webex video meetings to businesses and governments. It was one of the first companies to sell routers that let different kinds of computer networks exchange data, and in 2000 it briefly became the world's most valuable company. Customers run its network gear, from Wi-Fi access points to AI data center systems, with Cisco software that sets up and secures the network, while its Splunk unit searches computer logs to catch outages and attacks. Cisco earns money from hardware sales, software subscriptions, and support contracts. It was founded in 1984 and is based in San Jose, California.

Company size
10,001+
Company stage
IPO
Headquarters
San Jose, CA
Founded
1984

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