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NVIDIA

Designs the chips and software that power AI

Product Development Engineer

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeHsinchu, Hsinchu City, TaiwanNo salary listedIn-person

About the Job

Requirements

  • A master's degree or higher in Electrical Engineering, Computer Engineering, or Physics, with at least 2 years of experience.
  • Experience in post-silicon characterization, correlation, qualification including High-Temperature Operating Life (HTOL) testing, and debug.
  • Knowledge of automatic test equipment (ATE) testing, design-for-test (DFT) methodology, and complementary metal-oxide-semiconductor (CMOS) device physics.
  • Familiarity with CPU architecture fundamentals, such as cache hierarchies, coherency fabrics, and multi-core power management, or automotive high-reliability product lifecycles.
  • Ability to present and communicate to technical audiences, apply methodical problem-solving and critical thinking, focus on solutions, and attend to detail.
  • Motivation, a strong sense of ownership, interpersonal skills, teamwork, and intellectual honesty.

Responsibilities

  • Architect, design, and implement efficient manufacturing test processes for processor products.
  • Identify and implement test processes to improve manufacturing efficiency and test coverage for CPU architectures and automotive chips built using leading-edge process technology.
  • Analyze product yield limiters, drive minimum operating voltage (Vmin) and maximum frequency (Fmax) optimization through speed binning, and resolve failures on automatic test equipment while leading cross-functional efforts with design, foundry, quality, and test teams to identify root causes and implement improvements.
  • Define product test requirements and lead new product introduction (NPI) bring-up, validation, characterization, and reliability qualification such as AEC-Q100 for production ramp at worldwide manufacturing sites.
  • Optimize placement of test coverage across the test and supply chain to meet automotive zero-defect screening requirements and reduce cost.
  • Lead data analysis to correlate field and customer failures with internal production data to understand root cause, risk, and exposure.

Desired Qualifications

  • Understanding of design-for-test (DFT) insertion techniques, including scan (SCAN), automatic test pattern generation (ATPG), memory built-in self-test (MBIST), and logic built-in self-test (LBIST) for functional safety and in-field testing.
  • Understanding of automotive semiconductor quality standards, including AEC-Q100 qualification pathways and ISO 26262 functional safety guidelines.
  • Familiarity with JMP data analytics tools and Python, Java, or another scripting language for large-scale test data evaluation and screening limits such as part average testing (PAT).
  • Experience with ATE test programs, systems, and hardware such as 93K and uFlex for complex SoC/CPU bring-up and debug, and using failure diagnosis/isolation tools to identify silicon manufacturing defects.

About the Company

NVIDIA

Designs the chips and software that power AI

NVIDIA designs the chips and software that power artificial intelligence and sells complete data center systems to cloud providers, AI labs, and other businesses, along with GeForce graphics cards for gamers. Its GPUs, chips that perform thousands of calculations at once, became the main hardware for AI after researchers used them to train the AlexNet image-recognition model in 2012. NVIDIA connects many GPUs with its own processors and networking gear into servers and rack-sized computers, and developers program them through its CUDA software. These systems bring in most of its sales, and it also makes chips for cars and robots. Jensen Huang co-founded NVIDIA in 1993, and it is based in Santa Clara, California.

Company size
10,001+
Company stage
IPO
Headquarters
Santa Clara, CA
Founded
1993

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