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SiFive

Designs and sells RISC-V semiconductor cores

Staff Design Verification Infrastructure Engineer - Vips and Testbench

Test Automation EngineeringConfirmed live in the last 24 hours
Full-timeBengaluru, Karnataka, IndiaNo salary listed

About the Job

Requirements

  • Design Verification experience with System Verilog and Universal Verification Methodology (UVM)
  • Experience designing and verifying verification intellectual properties (VIPs), application-specific integrated circuits (AIPs), and other testbench components
  • Understanding of modern software engineering practices

Responsibilities

  • Architect, develop, and maintain the Verification Platform to provide a common infrastructure that scales with the growth of SiFive for Design Verification and other verification and validation activities
  • Develop Verification Platform libraries for expressing verification intent in Scala with Chisel, including test harnesses, stimulus, scoreboards, and other generators
  • Develop Verification Platform VIPs, AIPs, and other testbench components using System Verilog, UVM, and other related technologies
  • Develop Verification Platform test plans and testbenches to verify and release testbench components with high quality
  • Educate the Design Verification and other verification and validation teams on best practices and how to achieve them with the Verification Platform

Desired Qualifications

  • Experience with Chisel, Scala, and/or Python
  • Understanding of EDA tools and flows for Design Verification
  • Familiarity with DevOps practices, build systems, and CI / CD

About the Company

SiFive

Designs and sells RISC-V semiconductor cores

SiFive designs and sells RISC-V based processors and related IP for use in devices and systems. Its chips come as cores and system-on-chip designs built on the open RISC-V instruction set, enabling customers to integrate high-density, energy-efficient compute into products. Unlike competitors that rely on closed architectures, SiFive leverages openness to offer flexible, scalable, and cost-effective solutions that boost compute density. The company aims to grow the RISC-V ecosystem by delivering high-performance hardware that helps customers tackle data-heavy tasks and build smarter devices.

Company size
501-1,000
Company stage
Series G
Total funding
$772.5M
Headquarters
Santa Clara, CA
Founded
2015

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