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AMD

Designs chips for computers and AI systems

ATE Test Engineer

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeAustin, TX, USANo salary listedIn-person

About the Job

Requirements

  • Extensive Advantest V93000 test program development and debug experience, including SmarTest 8.
  • Proficiency in Java and at least one additional language, such as C++, Python, Perl, or shell scripting.
  • Experience developing test flows, methods, patterns, timing, levels, diagnostics, characterization plans, and manufacturing screens.
  • Experience leading or making significant architectural contributions to a Base Test Program, common Test Shell, or similar shared ATE infrastructure.
  • Linux or Unix proficiency, including revision control and disciplined software-release practices.
  • Experience with ORE or comparable offline simulation tools.
  • Knowledge of technologies such as PCIe, CXL, UCIe, Ethernet, JESD204, USB, DDR, HBM PHY, xGMI/Infinity Fabric, UPI, or NVLink.
  • Experience with link training, equalization, lane-level diagnostics, bit-error-rate testing, jitter analysis, voltage and timing margining, or ATE-to-bench correlation.
  • Knowledge of chiplet architectures, 2.5D/3D packaging, interposers, bridges, and known-good-die considerations.
  • Experience using AI-enabled or agentic workflows to improve test development, debug, validation, documentation, or engineering productivity.
  • Strong communication skills and demonstrated success leading and collaborating across geographically distributed teams.
  • Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

Responsibilities

  • Develop and integrate reusable wafer-sort Base Test Program and common Test Shell infrastructure, including test flows, services, configurations, diagnostics, data collection, and release controls.
  • Lead SmarTest 8 and Advantest V93000 test program development, debug, validation, release readiness, and production support.
  • Drive wafer-sort strategy, first-silicon bring-up, characterization, margining, screening, and diagnostics.
  • Integrate patterns, timing, levels, test methods, device configurations, binning, and debug capabilities into the common test program.
  • Troubleshoot complex interactions across silicon, test software, tester and probe hardware, patterns, timing, and manufacturing processes.
  • Partner with Design, Design for Test, Product Engineering, Yield Engineering, Test Hardware, and Manufacturing teams to improve coverage, testability, yield, test time, and product quality.
  • Define scalable architecture and coding practices that enable reuse across products, silicon revisions, test insertions, and manufacturing sites.
  • Lead technical reviews, document architectural decisions, mentor engineers, and support global engineering teams, manufacturing partners, and equipment vendors.

About the Company

AMD

Designs chips for computers and AI systems

AMD designs processors, graphics chips and AI accelerators for computer makers, cloud operators and businesses that build electronic devices. Its Ryzen processors power personal computers, while EPYC processors handle work in data centers and Radeon chips render graphics. Instinct accelerators run AI models, paired with software that developers use to train models and put them into production. AMD sells chips and related computing systems through equipment makers, distributors and retail channels, and contracts with outside foundries to fabricate its semiconductor designs. It was founded in 1969 and has its headquarters in Santa Clara, California.

Company size
10,001+
Company stage
IPO
Headquarters
Santa Clara, CA
Founded
1969

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