Design Verification Engineer @ SambaNova Systems

The era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce costs, drive efficiency and innovation to fundamentally transform their businesses and operations at scale.

SambaNova Suite™ is the first full-stack, generative AI platform, from chip to model, optimized for enterprise and government organizations. Powered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. Once adapted with customer data, customers retain model ownership in perpetuity, so they can turn generative AI into one of their most valuable assets.

Job Overview

SambaNova Systems is looking for talented and motivated engineers to help us solve some of the most challenging problems in machine learning, artificial intelligence, and data analytics. As a Design Verification Engineer you’ll have the opportunity to contribute to our cutting edge machine learning chips.

Responsibilities

Develop and maintain test-bench components, test cases, and scripts for design verification at the block, full chip, system, and gate-level benches
Develop test plan for functional, performance, and post-silicon verification
Participate in mapping and coding ML and AL application flows for verification and compiler development
Participate in design verification reviews, maintain regressions, and drive failure root-cause
Collaborate with design, architecture, and software teams to innovate and solve problems

Qualifications

BS in EE/CS (or related discipline). MS/PhD preferred.
Understanding of one or more of the following domains

Computer architecture, Machine Learning architecture

Curriculum covers all or several of the following subjects

Computer architecture, Machine learning algorithms, VLSI, Digital Design, SoC

Strong in coding with System Verilog and scripting. SVA and C/C++ skills preferred.
Strong debugging, analytical, and communication skills
Strong collaborator as we believe in no boundaries and collaboration across the entire organization with access to all levels and departments
Internship or research experience on ASIC development preferred
Knowledge of standard verification methodologies such as VMM, OVM, or UVM preferred

Annual Salary Range and Level

The base salary for this position ranges from $120,000/year up to $160,000/year. This range is based on role, level, and location and reflects the salary target for new hires in the US. Individual pay within the range will depend on a number of factors, including a candidate’s job-related qualifications, skills, competencies and experience, and location.

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Benefits Summary for US-Based Full-Time Direct Employment Positions

(The Recruiter will provide benefit details for non-US-based roles)

SambaNova offers a competitive total rewards package, including the base salary, plus equity and benefits. We cover 95% premium coverage for employee medical insurance, and 77% premium coverage for dependents and offer a Health Savings Account (HSA) with employer contribution. We also offer Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life, and AD&D insurance plans in addition to Flexible Spending Account (FSA) options like Health Care, Limited Purpose, and Dependent Care. Our library of well-being benefits available to you and your dependents includes a full subscription to Headspace, Gympass+ membership with access to physical gyms, One Medical membership, counseling services with an Employee Assistance Program, and much more.

Submission Guidelines

Please note that in order to be considered an applicant for any position at SambaNova Systems, you must submit an application form for each position for which you believe you are qualified.

If you are a new, recent (within the last two years), or upcoming college graduate and are interested in opportunities with SambaNova Systems, please apply through our university job listings.

EEO Policy

SambaNova Systems is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard basis of age (40 and over), color, disability, gender identity, genetic information, marital status, military or veteran status, national origin/ancestry, race, religion, creed, sex (including pregnancy, childbirth, breastfeeding), sexual orientation, and any other applicable status protected by federal, state, or local laws.

Design Verification Engineer

SambaNova Systems

Compensation Overview

Job Overview

(The Recruiter will provide benefit details for non-US-based roles)

6 month growth

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2 year growth

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