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SiTime

Fabless MEMS timing solutions provider

Engineer 2 - Analog Mixed-Signal Design 1

Silicon & ASIC DesignUpdated on Nov 13
Full-timeRijswijk, NetherlandsIn-person

About the Job

Requirements

  • An M.S. or Ph.D. in Electrical Engineering is required.
  • An excellent academic record with published research projects prototyped and proven in silicon is required.
  • Detailed knowledge of CMOS circuits and noise analysis is required.
  • Graduate coursework and design expertise in one or more of the following analog blocks is required: Integer-N and fractional-N phase-locked loops, temperature sensors, sigma-delta analog-to-digital converters, analog and digital filters, differential and cascode amplifiers, low-noise buffers, high-speed output drivers, sub-threshold circuits, and low-noise regulator and bandgap circuits.
  • Knowledge of MATLAB and VerilogA is required.
  • Proficiency in Cadence analog design tools is required.
  • The ability to oversee circuit layout for critical blocks is required.
  • Excellent written and verbal communication skills are required.

Responsibilities

  • Design analog and mixed-signal circuits that meet architectural requirements and technical specifications.
  • Contribute to the architectural definition of the design and chip integration.
  • Perform calculations, design and verification simulations to ensure building blocks meet specifications at schematic level and after post-layout extraction, while provisioning for design for test and design for manufacturability.
  • Work closely with Layout Engineers to validate proper layout using best-known methods.
  • Document assigned blocks and hold preliminary and final design review meetings.
  • Participate in chip bring-up, evaluation, and characterization, with emphasis on owned blocks.
  • Work cross-functionally with Product, Characterization, Test, and Application Engineers on issues related to owned circuit blocks.
  • Support other projects as requested by management or as business needs change.

Desired Qualifications

  • Work well with others in a collaborative, fast-paced team environment.

About the Company

SiTime

Fabless MEMS timing solutions provider

SiTime designs MEMS-based timing solutions (oscillators, network synchronizers, and jitter cleaners) as a fabless semiconductor company. MEMS resonators on silicon replace quartz to generate precise clocks and synchronize networks, with manufacturing handled by third-party foundries. The approach offers smaller size, lower power consumption, and better temperature stability, supported by scalable, design-focused development rather than in-house fabrication. Its goal is to expand MEMS timing adoption across automotive, industrial, IoT, mobile, aerospace, and telecom markets worldwide.

Company size
501-1,000
Company stage
IPO
Headquarters
Santa Clara, CA
Founded
2005

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