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Headlands Tech Holdings

Global quantitative trading strategies for equities

FPGA Engineer

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeNo salary listed

About the Job

Requirements

  • Professional experience with FPGA/ASIC design and verification
  • Experience developing reusable IPs and scaling designs to multiple target platforms
  • Solid understanding of digital design principles
  • Strong working knowledge of either SystemVerilog/Verilog/VHDL
  • In-depth knowledge of common EDA tools
  • Knowledge of C++ required
  • Familiarity with common scripting languages TCL/Python/Bash
  • University degree in EE, CS, CE or related technical field

Responsibilities

  • Design and verify RTL implementations for trading systems
  • Develop reusable IP components that can be deployed across multiple platforms
  • Integrate hardware designs with wider technology stack
  • Script automation tasks and workflow improvements
  • Collaborate with software, research, and systems teams

Desired Qualifications

  • Experience with high-speed transceivers, networking protocols, and packet processing is preferred

About the Company

Headlands Tech Holdings

Global quantitative trading strategies for equities

Headlands Technologies builds and runs algorithmic trading strategies for exchange-traded securities, using data-driven models to make trading decisions. Its software analyzes market data, executes trades automatically across electronic venues, and manages risk in real time. The firm distinguishes itself by being privately funded with no outside investors and by operating from offices in Chicago, London, and San Francisco. Its goal is to profit from automated trading while maintaining disciplined capital and risk controls.

Company size
51-200
Company stage
Not listed
Total funding
Not listed
Headquarters
Chicago, IL
Founded
2009

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