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Capgemini

Global consulting, technology services, outsourcing

Expert RTL Design

Silicon & ASIC DesignUpdated on Nov 14
Full-timeMontbonnot-Saint-Martin, FranceNo salary listedIn-person

About the Job

Requirements

  • At least 15 years of experience in digital or mixed-signal IP design and verification.
  • At least 15 years of experience integrating IP at the SoC, partition, or FPGA level.
  • Experience with one or more of the following areas: MCU or single-/multi-core MPU SoCs; ARM, MIPS, or RISC-V CPU instruction set architectures; buses and interconnects; memory controllers; GPU or NPU accelerators; communications functions; ADC or DAC controllers; RC or crystal oscillators; or PLLs.

Responsibilities

  • Study and specify digital or mixed-signal digital-analog IP used in ASIC components.
  • Study SoC architecture.
  • Design or adapt IP in RTL using Verilog, SystemVerilog, or VHDL while following DFT, CDC, RDC, lint, and UPF rules.
  • Integrate IPs into a partition or at the SoC level.
  • Contribute to project quality by working with VLSI verification, integration, physical design, software/firmware, and product and test engineering teams.

Desired Qualifications

  • Knowledge of one or more of the DO-254, ISO 26262, or ASPICE standards.

About the Company

Capgemini

Global consulting, technology services, outsourcing

Capgemini provides consulting, technology services, and outsourcing to help organizations transform digitally. Its offerings include strategy and transformation consulting, system integration, application development, IT infrastructure management, and managed IT operations. It differentiates itself with a global presence in over 50 countries and a focus on applying AI, cloud, and cybersecurity to real business problems. Its goal is to help clients navigate digital transformation and improve efficiency and innovation through tailored, contract-based or managed services.

Company size
10,001+
Company stage
IPO
Headquarters
Paris, France
Founded
1967

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