Full-Time

Module Design Engineer Architect

Apple

Apple

10,001+ employees

Designs and sells hardware and software

No salary listed

Cupertino, CA, USA

In Person

Bachelor's, Master's, PhD

Category
Electrical Engineering
Required Skills
Six Sigma
Data Analysis
FEM/FEA

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Requirements
  • A Bachelor of Science degree in Electrical Engineering, Computer Engineering, or a related field is required.
  • Experience in electrical architecture, mixed-signal design, or camera/imaging subsystem development for consumer electronics is required.
  • Experience defining or designing camera subsystems, including image sensor interfacing, actuator drivers, and low-noise power delivery on rigid printed circuit boards, flex, or system-in-package substrates is required.
  • Experience with high-speed serial interface design, including MIPI CSI-2, D-PHY, and C-PHY, signal integrity analysis, channel simulation, and laboratory correlation is required.
  • The role requires expertise in mixed-signal design, high-speed serial interfaces, camera subsystem architecture, CMOS image sensor readout architectures, MIPI CSI-2, ACI or ALPDP interface design, camera actuator driver topologies, flash/strobe subsystems, and low-noise power management for imaging applications.
  • The role requires understanding of LDO/DC-DC selection, PSRR budgeting, decoupling strategy, dynamic power state transitions, camera module electro-optical performance trade-offs, EMI/EMC considerations, and signal integrity constraints.
  • The role requires practical implementation experience in high-volume, high-reliability manufacturing environments.
Responsibilities
  • Define end-to-end electrical architecture for camera subsystems, including the sensor-to-SoC signal chain, MIPI CSI-2, ACI, ALPDP lane budgeting, clocking topology, reset/control sequencing, and multi-camera synchronization schemes.
  • Architect power delivery networks for image sensors, actuators such as VCM/OIS, and flash subsystems, including rail partitioning, PSRR budgeting, transient response requirements, and low-noise regulator selection.
  • Lead high-speed interface design and signal integrity analysis for MIPI, ACI, or ALPDP lanes, including channel budgeting, connector/flex selection, EMI mitigation, and pre- and post-layout signal and power integrity simulation correlation.
  • Define schematic and printed circuit board/flex layout guidelines for camera modules and system boards, including reference designs, layer stackup requirements, impedance targets, and design-for-manufacturing/design-for-test rules for global manufacturing.
  • Drive cross-functional architecture reviews with SoC ISP, PMIC, RF, mechanical, and optics teams to align on power budgets, thermal envelopes, form-factor constraints, and testability requirements.
  • Partner with image sensor and actuator suppliers to influence next-generation silicon roadmaps, review datasheets and errata, and negotiate interface, power, and reliability specifications.
  • Support EVT/DVT/PVT bring-up and validation by leading debug of high-speed link failures, power integrity issues, EMI/ESD events, and image-quality-linked electrical root causes.
  • Lead Failure Analysis and Corrective Action investigations by developing electrical characterization methodologies and diagnostic strategies to identify root causes of camera subsystem failures across engineering builds and mass production.
  • Analyze electrical margin data, temperature/voltage corner sweeps, and yield signatures to drive design guardbands, screening strategies, and preventive design changes across product generations.
  • Maintain comprehensive architecture documentation, including block diagrams, interface specifications, power state tables, timing diagrams, and compliance matrices for internal teams and suppliers.
  • Participate in design reviews with camera module, system board, and product design teams to ensure architectural integrity, testability, and validation coverage throughout the product lifecycle.
  • Interface with camera algorithm, ISP firmware, and system software teams to translate imaging use cases such as HDR, ProRAW, Cinematic mode, low-light, and high-frame-rate video into concrete electrical architecture and power state requirements.
Desired Qualifications
  • A Master's or PhD in Electrical Engineering or a relevant field is preferred.
  • Ten or more years of relevant industry experience is preferred.
  • Ability to lead EVT/DVT/PVT bring-up, own Failure Analysis and Corrective Action processes, and resolve line-down or yield-impacting issues in production environments is preferred.
  • Working knowledge of imaging and interface standards and specifications, including MIPI CSI-2, ACI, ALPDP, I2C/I3C, SPMI, SPI, MIPI CCS, EMI/EMC standards, and IEC ESD, is preferred.
  • Experience with camera factory testing equipment, end-to-end imaging validation methods, and electro-optical data interpretation for quality control is preferred.
  • Experience with statistical analysis tools and methodologies, including SPC, DOE, and Six Sigma, applied to electrical characterization and yield engineering is preferred.

Apple designs, manufactures, and sells hardware and software across iPhone, iPad, Mac, Apple Watch, and Apple TV, plus services like the App Store, Apple Music, iCloud, and Apple Pay. The products work together through an integrated ecosystem where devices run Apple’s own operating systems and sync data via iCloud, delivering a seamless user experience. It differentiates itself by controlling both hardware and software end-to-end, maintaining a unified design, and expanding services and spatial computing. Its goal is to provide a cohesive, high-quality experience across devices while growing services revenue and expanding its ecosystem.

Company Size

10,001+

Company Stage

IPO

Headquarters

Cupertino, California

Founded

1976

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Simplify Jobs

Simplify's Take

What believers are saying

  • Reuters reported July 30, 2026 revenue of $109.42 billion, up 16.4%.
  • September 2026 Duo launch opens a new premium category and upgrade cycle.
  • IDC expects Apple to capture 40% of foldable shipments by end-2027.

What critics are saying

  • DOJ's March 2024 monopoly case and Epic proceedings threaten App Store economics in 2026.
  • EU General Court's July 2026 ruling keeps Apple trapped under DMA gatekeeper restrictions.
  • Foldable Duo's $1,999 price risks niche adoption and margin pressure against Samsung.

What makes Apple unique

  • Apple's 2026 iPhone Duo and A20 Pro deepen ecosystem lock-in across devices.
  • John Ternus' September 2026 debut signaled faster hardware iteration and tighter AI integration.
  • Apple's custom chips and C2 modem reduce Qualcomm dependence and strengthen margins.

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Benefits

Health Insurance

Dental Insurance

401(k) Retirement Plan

401(k) Company Match

Tuition Reimbursement

Performance Bonus

Relocation Assistance

Employee Stock Purchase Plan

Growth & Insights and Company News

Headcount

6 month growth

0%

1 year growth

-1%

2 year growth

-6%
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Morgan Stanley analyst Erik Woodring has maintained an overweight rating on Apple with a $360 price target, citing accelerated innovation at the company's September product event. The analyst highlighted Apple's first foldable iPhone, new A20 chips, and enhanced Siri capabilities as signs of stronger momentum under new CEO John Ternus, who recently replaced Tim Cook. Woodring noted that 57% of Apple's installed base—roughly 690 million devices—runs phones older than the iPhone 15 Pro, whilst 87% cannot handle complex Siri AI workloads. With consumers keeping iPhones for over four years, this creates significant upgrade potential. Apple recently reported strong fiscal third-quarter results with revenue of $109.4 billion, up 16% year-over-year, and earnings per share of $2.02, up 29%.

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Business Insider
Sep 10th, 2026
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