Senior Software Engineer - Multiple Teams

• Develop low-level drivers and kernel-level modules.
• Develop embedded C++ services running natively on ARM CPU cores to manage storage queues, ring buffers, and Peripheral Component Interconnect Express (PCIe)/Direct Memory Access (DMA) controllers.
• Optimize the data-path for microsecond-level latency and millions of IOPS using advanced hardware features like physical doorbells and direct cache routing.

Minimum qualifications:

• Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent practical experience.
• 5 years of software development experience in C or C++ with a focus on systems programming.
• Experience with low-level systems architecture: PCIe, DMA, IOMMU, memory-mapped I/O (MMIO), and interrupt handling.
• Experience debugging on pre-silicon or early bring-up platforms using hardware emulators (e.g., P3, CSS models) or physical logic analyzers/JTAG.

Preferred qualifications:

• Master’s degree or PhD in Engineering, Computer Science, or a related technical field.
• Experience with custom SoC storage virtualization technologies (e.g., NVMe/SCSI controller emulation, VirtIO).
• Familiarity with storage data protection protocols, including block cryptography and data integrity validation (logical block addressing (LBA) mapping, cryptographic hashes).
• Understanding of hardware-level security architectures.

Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google’s needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.

With your technical expertise you will manage project priorities, deadlines, and deliverables. You will design, develop, test, deploy, maintain, and enhance software solutions.

As a Senior Software Engineer for the IPU Storage Offloads team, you will design and implement the low-level software and firmware that powers Google’s next-generation Infrastructure Processing Unit (IPU). You will focus on the Persistent Disk (PD) data path, enabling high-performance NVMe emulation, hardware compression/decompression, and hardware-accelerated cryptography.

You will bridge the gap between ASIC capabilities and core block-storage services to deliver unprecedented Input/Output Operations per Second (IOPS) and latency metrics while guaranteeing end-to-end data integrity and confidentiality.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $174000 - $252000 (USD) + 15% bonus target + equity + benefits

Learn more about benefits at Google.

• Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent practical experience.
• 5 years of software development experience in C or C++ with a focus on systems programming.
• Experience with low-level systems architecture: PCIe, DMA, IOMMU, memory-mapped I/O (MMIO), and interrupt handling.
• Experience debugging on pre-silicon or early bring-up platforms using hardware emulators (e.g., P3, CSS models) or physical logic analyzers/JTAG.