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Synopsys

EDA software for chip design

Staff Applications Engineering

Implementation & Technical Account ManagementConfirmed live in the last 24 hours
Full-timeUnited StatesIn-person

About the Job

Requirements

  • A BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline is required.
  • Extensive experience in EDA, ASIC/SoC design, physical implementation, or timing-signoff methodologies, with a track record of solving complex production problems.
  • Deep knowledge of static timing analysis, multi-corner multi-mode analysis, variation modeling, noise analysis, and advanced-node signoff challenges.
  • Hands-on experience with PrimeTime or comparable timing-signoff solutions, including Tcl-based automation and constraint management.
  • Strong scripting skills in Tcl and Python for workflow automation, data analysis, and tool integration.
  • Ability to ask effective questions in customer meetings and produce a clear plan for the design team and R&D counterparts.
  • Ability to explain complex timing violations or distributed STA architecture to executives while retaining relevant technical nuance.
  • Ability to manage multiple beta programs, escalations, and roadmap discussions concurrently.
  • Ability to identify patterns across customer issues and turn them into actionable product improvements.

Responsibilities

  • Drive deployment and production readiness of PrimeTime capabilities, including HyperGrid, distributed STA, native IR-aware timing, thermal-aware analysis, aging models, and multi-die signoff at strategic semiconductor customers.
  • Engage directly with customer design teams to understand signoff challenges, define success criteria, lead technical reviews, and accelerate adoption of new PrimeTime technologies.
  • Partner with R&D to evaluate new architectures, validate functionality, improve performance and capacity, and resolve complex product issues across the PrimeTime platform.
  • Lead beta programs and pre-production evaluations, including release qualification, deployment planning, and structured feedback loops that shape product priorities.
  • Translate customer requirements, deployment experience, and competitive insights into roadmap recommendations for Product Management and Engineering.
  • Champion next-generation initiatives such as cloud-native PrimeTime, AI-assisted Tcl generation and debugging, automated SDC generation, and ML-based corner optimization.
  • Resolve critical customer escalations through technical analysis, root-cause identification, workarounds, and long-term corrective actions.
  • Enable successful tapeouts by ensuring PrimeTime signoff solutions work reliably on complex designs at advanced nodes.
  • Shape the PrimeTime roadmap by translating deployment challenges into actionable product priorities for R&D.
  • Accelerate time-to-production for new capabilities such as distributed STA and multi-die analysis.
  • Strengthen customer relationships by serving as a technical leader who delivers solutions under production pressure.
  • Influence next-generation timing signoff technology, including cloud-native workflows and AI-assisted design automation.
  • Mentor Product and Application Engineers to raise technical capability and deployment effectiveness.
  • Create feedback loops between customers, field teams, and R&D to surface issues early and improve product quality.
  • Push back on features that are not ready for production while keeping teams aligned and customers confident.
  • Work within the PrimeTime Product Engineering organization, collaborating with R&D engineers, field application engineers, and product managers on timing signoff solutions.

Desired Qualifications

  • Experience with distributed STA, HyperGrid, cloud computing, AI/ML-enabled EDA, multiphysics analysis, or 3DIC signoff is a strong plus.
  • A track record of deploying new technologies at leading semiconductor customers and influencing product roadmaps through structured technical feedback is highly valued.

About the Company

Synopsys

EDA software for chip design

Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.

Company size
10,001+
Company stage
IPO
Headquarters
Sunnyvale, CA
Founded
1986

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