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Alta Ares

Autonomous AI defense and ISTAR platform

FPGA Engineer - Electronic Warfare

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeParis, FranceNo salary listedIn-person

About the Job

Requirements

  • A Master of Science in Electrical Engineering, Electronics Engineering, Signal Processing, or a related field.
  • Strong experience developing and verifying register-transfer-level designs in VHDL or SystemVerilog, focused on digital signal processing.
  • Practical experience implementing designs on system-on-chip FPGAs, including synthesis, implementation, timing analysis, and hardware debugging.
  • Strong understanding of sampled signals, frequency conversion, digital filtering, spectral analysis, and fixed-point numerical behavior.
  • Ability to reason across FPGA, processor, and RF hardware boundaries when making design decisions.
  • Ability to model algorithms and compare reference models with hardware results.
  • Familiarity with MATLAB, Simulink, Python, or high-level synthesis is a plus.
  • Familiarity with RF measurements and laboratory equipment, including spectrum analyzers, signal generators, and oscilloscopes, is a plus.
  • Prior experience in electronic warfare is welcome but not required.
  • Methodical debugging ability to isolate problems across complex signal chains.
  • Ability to own a technical scope independently and communicate progress, risks, and trade-offs clearly.
  • Rigorous approach to verification, documentation, and design traceability.
  • Ability to collaborate across disciplines and adapt to evolving product requirements.
  • Ability to operate autonomously in a fast-growing company.
  • High integrity and professionalism in handling sensitive defense technologies.

Responsibilities

  • Own the development of FPGA functions for electronic warfare and signals intelligence capabilities, from initial architecture to validation on operational hardware.
  • Work with systems and algorithm engineers to define processing requirements and assess implementation feasibility.
  • Build register-transfer-level modules in VHDL or SystemVerilog to process digitized RF signals, extract relevant information, and generate waveforms.
  • Adapt and validate digital signal processing algorithms for FPGA implementation, balancing numerical accuracy, processing speed, and hardware resources.
  • Integrate acquisition and processing chains, including digital down-conversion, filtering, channelization, fast Fourier transform, detection, direction-finding, and classification.
  • Establish verification methods and testbenches to check functional behavior and performance throughout development.
  • Connect programmable logic to RF converters and embedded processors, defining data transfers, control interfaces, clocking, and synchronization.
  • Resolve implementation constraints, achieve timing closure, and optimize resource utilization and power consumption.
  • Bring up FPGA designs on target boards, investigate integration issues, and correlate measured behavior with simulation results.
  • Contribute to laboratory and field testing alongside RF, software, and systems engineers.
  • Maintain clear design records, interface specifications, and validation evidence.
  • Improve reusable FPGA components and development practices as the product portfolio grows.

Desired Qualifications

  • Familiarity with MATLAB, Simulink, Python, or high-level synthesis.
  • Familiarity with RF measurements and laboratory equipment, including spectrum analyzers, signal generators, and oscilloscopes.
  • Prior experience in electronic warfare is welcome but not required.

About the Company

Alta Ares

Autonomous AI defense and ISTAR platform

Alta Ares builds an autonomous AI defense stack for air defense and ISTAR missions, combining hardware interceptors, software for sensing and decision-making, and a mission-management layer to operate in GNSS-denied environments. It includes Black Bird, a turbojet interceptor for mid-long range threats, and X-Lock, a multirotor interceptor for drone swarms, both with AI-guided terminal guidance that works under jamming. Its software lineup features Pixel Lock for counter-UAS detection and guidance, Gamma ISTAR for real-time edge video intelligence, and Cyclops for sensor fusion and mission planning. The company positions itself as a sovereign European builder serving allied nations from the Baltic to the Indo-Pacific, aiming to provide interoperable, rapidly deployable defense capabilities and to grow its sovereign industrial base; it has a €50M Series A in June 2026 and was the first investment of Airbus-backed E2D defence fund.

Company size
51-200
Company stage
Series A
Total funding
$57.2M
Headquarters
Romainville, France
Founded
2024

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