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NVIDIA

Designs the chips and software that power AI

Technical Program Manager - DFX Productization

Program ManagementConfirmed live in the last 24 hours
Full-time

About the Job

Requirements

  • A bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience; a master's degree is preferred.
  • At least 6 years of experience in semiconductor technical program management, test engineering, DFX, or post-silicon validation.
  • Hands-on knowledge of the ASIC/SoC development flow and working familiarity with DFX concepts, including SCAN, ATPG, MBIST, and JTAG, as well as post-silicon bring-up, test, and productization.
  • Demonstrated ability to drive execution with multifunctional teams and concurrent programs while keeping sophisticated schedules on track.
  • Ability to work through rapid development cycles and constant change, remaining flexible and calm amid uncertainty.
  • Self-motivation, proactivity, attention to detail, and critical-thinking capabilities.
  • Proficiency with program management tools and data such as Jira, Smartsheet, and Confluence.

Responsibilities

  • Drive DFX programs for chip designs from plan of record through production release, ensuring silicon is test-ready, production-ready, and released on schedule.
  • Own DFX program execution across the lifecycle, particularly the post-silicon phases where test content, yield, and quality come together for release.
  • Keep DFX deliverables on track to program milestones, surface risks early, and support execution from first silicon through production ramp.
  • Work with DFX engineering managers and engineers and cross-functional partners in silicon design, physical design, verification, post-silicon validation, test engineering, operations, and software to drive DFX execution across multiple concurrent programs.
  • Own the integrated DFX execution schedule for assigned programs from plan of record through production release, tracking dependencies and deliverables against milestones including tapeout, first silicon, bring-up, qualification, and release.
  • Drive pre-silicon test readiness, ensuring DFX features, test patterns, and ATE test programs are ready ahead of tapeout and silicon arrival.
  • Lead post-silicon DFX bring-up execution, coordinating SCAN, MBIST, IO, and other test-content debug across DFX, validation, and test engineering teams.
  • Track and drive productization milestones with Operations, including ATE test-time reduction, test coverage, yield learning, and DPPM/quality targets required for qualification and production release.
  • Coordinate handoffs to Operations and support production-ramp readiness, including system-level and datacenter test needs.
  • Run regular program-execution reviews; capture decisions, actions, and owners; manage scope changes; and drive items to closure.
  • Identify schedule and quality risks, partner with engineering on mitigation plans, and provide data-driven status and recommendations to leadership for trade-off decisions.
  • Assemble lessons learned and apply standard methodologies across programs to continuously improve DFX execution.

Desired Qualifications

  • Experience with ATE platforms and production test flows.
  • Exposure to datacenter testability challenges, including system-level and in-field testing.
  • Experience with yield analysis and manufacturing quality metrics.
  • Scripting experience in Python.

About the Company

NVIDIA

Designs the chips and software that power AI

NVIDIA designs the chips and software that power artificial intelligence and sells complete data center systems to cloud providers, AI labs, and other businesses, along with GeForce graphics cards for gamers. Its GPUs, chips that perform thousands of calculations at once, became the main hardware for AI after researchers used them to train the AlexNet image-recognition model in 2012. NVIDIA connects many GPUs with its own processors and networking gear into servers and rack-sized computers, and developers program them through its CUDA software. These systems bring in most of its sales, and it also makes chips for cars and robots. Jensen Huang co-founded NVIDIA in 1993, and it is based in Santa Clara, California.

Company size
10,001+
Company stage
IPO
Headquarters
Santa Clara, CA
Founded
1993

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