Analog Devices

Designs high-performance analog and DSP ICs

DFT Engineer - DFT Engineering

Hardware Validation & TestingConfirmed live in the last 24 hours

Full-timeBengaluru, Karnataka, IndiaNo salary listedRemote

About the Job

Requirements

A Bachelor's or Master's degree in Electrical or Electronic Engineering, or a related field.
Three to eight years of hands-on experience in design-for-testability methodologies and techniques.
Strong knowledge of logic built-in self-test, automatic test pattern generation, design-for-testability design rule checking, scan compression, low-power design-for-testability techniques, memory built-in self-test, boundary scan, analog design-for-testability, JTAG architecture, and design-for-testability static timing analysis constraint development.
Hands-on expertise with Siemens design-for-testability electronic design automation tools for scan stitching, design rule checking, automatic test pattern generation, coverage improvement, memory built-in self-test, and boundary scan.
Proficiency in Perl, Tcl, and/or Python scripting for automation.
A solid understanding of digital design fundamentals, register-transfer-level coding, lint and clock-domain crossing checks, low-power checks, and the application-specific integrated circuit design flow.
The ability to analyze and debug test failures and resolve issues collaboratively.
Applicants may be subject to export licensing review when accessing technical data.
Ability to work effectively in a team-oriented environment.

Responsibilities

Collaborate with the design team to ensure efficient and effective testability of complex integrated circuits.
Design and implement design-for-testability features such as scan chains, compression, and built-in self-test structures to enhance testability.
Conduct design-for-testability design rule checking in register-transfer-level and netlist databases to ensure compliance with design-for-testability guidelines and rules.
Use Siemens design-for-testability tools to perform design-for-testability analysis and optimize testability metrics.
Generate manufacturing automatic test pattern generation patterns for stuck-at and transition fault models using on-chip test compression techniques.
Design and verify memory built-in self-test, including repair, using Siemens electronic design automation tools.
Validate design-for-testability structures and patterns in register-transfer-level and netlist environments with and without standard delay format.
Work with the verification team to define and implement design-for-testability verification plans.
Work with the physical design team on design-for-testability implementation and constraint strategies for synthesis and static timing analysis.
Analyze and debug test failures and collaborate with the test engineering team to resolve issues.
Provide guidance and mentorship to junior design-for-testability engineers.

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

Job Description:

We are seeking a skilled and experienced DFT Engineer to join our VLSI design team. The ideal candidate should have a strong background in Design for Testability (DFT) techniques, including LBIST (Logic Built-In Self-Test), ATPG (Automatic Test Pattern Generation), DFT DRC (Design Rule Checking), MBIST (Memory Built-in Sefl-Test), Boundary Scan, JTAG and Analog/Phy DFT.

Responsibilities:

Collaborate with the design team to ensure efficient and effective testability of complex integrated circuits.
Design and implement DFT features such as scan chains, compression, and built-in self-test structures to enhance testability.
Conduct DFT DRC checks in RTL/Netlist database to ensure compliance with DFT guidelines and rules.
Utilize Siemen’s DFT tool to perform DFT analysis and optimize testability metrics.
Generating high quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models using on-chip test compression techniques.
MBIST Design (including repair) and Verification using Siemen’s EDA tool.
Validation of DFT structures/patterns in RTL, Netlist with and without SDF.
Work closely with the verification team to define and implement DFT verification plans.
Work closely with physical design team for DFT implementation/constraints strategy for synthesis/STA.
Analyze and debug test failures and collaborate with the test engineering team to resolve issues.
Provide guidance and mentorship to junior DFT engineers.

Qualifications:

Bachelor's/Master's degree in Electrical/Electronic Engineering, or a related field.
3-8 years of hands-on experience in DFT methodologies and techniques.
Strong knowledge of LBIST, ATPG, DFT DRC, Scan compression, Low power DFT Techniques, MBIST, Boundary Scan, Analog DFT, JTAG Architecture, DFT STA Constraint development.
Hand-on experience/expertise in Siemen’s DFT EDA tools for Scan stitching, DRC, ATPG, Coverage improvement, MBIST, Boundary Scan.
Proficiency in scripting languages such as Perl, Tcl, and/or Python for automation.
Solid understanding of digital design fundamentals, RTL coding, Lint/CDC, Low Power Checks and ASIC design flow.
Excellent problem-solving skills and ability to work effectively in a team-oriented environment.
Strong communication and interpersonal skills.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days

About the Company

Analog Devices

Designs high-performance analog and DSP ICs

Analog Devices designs, manufactures, and markets high-performance analog, mixed-signal, and DSP integrated circuits used in many electronic devices. Its products include data converters, amplifiers, and power-management ICs that OEMs embed to sense, convert, and process signals, enabling reliable communication between the physical world and digital systems. ADI differentiates itself through a broad, specialized portfolio and close partnerships with OEMs across multiple industries—industrial, automotive, communications, and consumer—to solve complex engineering challenges. The company’s goal is to provide trusted signal-processing solutions that help customers design capable, reliable products by bridging the gap between the physical and digital domains.

Company size: 10,001+
Company stage: IPO
Headquarters: Wilmington, MA
Founded: 1965

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