R&D Engineering Principal Engineer
Synopsys
R&D Engineering Principal Engineer
Synopsys
EDA software for chip design
The hiring manager is open to hiring in Sunnyvale and Hillsboro also apart from the primary preference of, Austin, TX.
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are a visionary and highly experienced engineering professional, passionate about verification and digital design methodologies. With at least 5 to 10 years of solid experience in IP and SoC verification, you have consistently demonstrated technical excellence and leadership in your career. You thrive in challenging environments and are adept at architecting robust verification infrastructures from the ground up, particularly within the EDA ecosystem.
What You’ll Be Doing:
* Applying AI techniques to accelerate design verification – leveraging internal and/or external agentic AI tools to generate verification plan, testcases, coverage and debug collaterals
* Implementing reference and unified verification flows for Synopsys digital IP products using leading EDA tools such as VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs.
* Building robust, scalable verification infrastructures from the ground up to support diverse and complex IP and SoC projects.
* Partnering with global engineering teams to define, document, and propagate best-in-class verification methodologies and standards.
* Leading and mentoring junior engineers, fostering a culture of technical growth, innovation, and collaboration within the team.
* Driving technical initiatives and independently managing high-impact assignments, ensuring timely and high-quality deliverables.
* Collaborating closely with tool development teams to influence product evolution and optimize verification workflows for maximum efficiency.
* Supporting customers and internal stakeholders by troubleshooting, optimizing, and refining verification processes and flows.
What You’ll Need:
*Minimum 12+ years of hands-on experience in IP/SoC verification, with a proven track record of hands-on technical contributions.
*Good understanding of Agentic AI technologies specifically Cursor and/or VS Code co-pilot.
*Passion to learn Agentic AI mechanisms and apply them for design verification.
*Familiarity with Synopsys verification tools such as VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs.
*Demonstrated ability to validate verification flows and infrastructure for complex digital designs.
*Exposure to Agentic AI EDA tools will be a big plus.
*Solid programming and scripting skills (SystemVerilog, UVM, Tcl, Python or similar languages).
*Bachelor’s or Master’s degree in electrical/Electronics/Computer engineering
*Experience with multi-tasking and managing technical projects independently.
*Ability to document, communicate, and propagate technical methodologies across global teams.
The Impact You Will Have:
* Elevate Synopsys’ digital IP verification capabilities by delivering robust, unified, and scalable methodology solutions.
* Accelerate time-to-market for high-performance silicon products by streamlining and standardizing verification processes.
* Empower global verification teams with best-in-class flows, tools, and practices, driving consistent project success.
* Shape the verification strategy for next-generation Synopsys IP and SoC offerings, directly influencing product quality and customer satisfaction.
* Mentor and develop the next wave of verification engineers, fostering a culture of learning and technical excellence.
* Contribute to the evolution of Synopsys’ EDA tool ecosystem by providing critical feedback and championing innovative solutions.
* Enhance Synopsys’ leadership position in the semiconductor industry through continuous improvement and adoption of cutting-edge verification methodologies.
Who You Are:
* Innovative problem solver who thrives in dynamic, fast-paced environments.
* Excellent communicator, able to distill complex technical topics for diverse audiences.
* Natural mentor and team player, passionate about knowledge-sharing and team development.
* Strategic thinker with a keen eye for detail and a commitment to quality.
* Self-motivated leader who takes initiative and drives projects to successful completion.
* Adaptable, resilient, and eager to learn and grow alongside industry leaders.
The Team You’ll Be A Part Of:
You will be a core member of the newly established Digital IP Verification Methodology
(COE) team, a group of forward-thinking engineers dedicated to advancing verification excellence at Synopsys. The team collaborates across global sites, driving innovation in methodology, tool integration, and best practices. Together, you will shape the future of digital IP verification, enabling Synopsys and its customers to deliver world-class silicon solutions.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.
Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.
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