Staff System Validation Engineer

About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.  

Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions.  Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time. 

Are you ready?  

To learn more about SiFive’s phenomenal success and to see why we have won theGSA’s prestigious Most Respected Private Company Award(for the fourth time!), check out ourwebsiteandGlassdoorpages.

Job Description:

The Role:
As a RISC-V System Validation Engineer in the CoreIP team, you will develop, deploy, and support emulation and/or FPGA environments. You will collaborate with cross-functional disciplines to define emulation test strategy, define test-frameworks, implement test-plans, and debug complex emulation hardware, software, and silicon design issues.

Responsibilities

• Bring up Silicon designs on FPGA platforms, root causing design, test and emulator environment issues failures.

• Collaborate with cross-functional teams on developing and implementing emulation strategies based on product goals.

• Establish key hardware and software on emulation to establish readiness for silicon and software bring-up.

Requirements

• FuSa or RAS system level validation experience is a plus.

• Solid understanding of processor and SoC architecture, or a strong desire and ability to learn the same.

• Above 5 years direct system development, validation and debugging on FPGA platform experience

• Ability to debug processor designs on FPGA platforms.

• The experience for linux-based open source software development.

• A conscientious and thorough approach to Design Verification and System Validation.

• A thorough understanding of the high-level verification flow methodology (test plan generation, test generation, failure analysis, coverage analysis, and closure).

• Good interpersonal skills to listen to diverse points of view and influence people from different disciplines.

• An unwavering dedication to product quality

• Familiarity with and/or ability to learn languages and methodologies that are not part of the industry-standard approach to verification (Scala, Chisel, etc.).

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

Taiwan

Any offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.

SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.