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Astera Labs

Designs chips that connect data center systems

Product Application Engineer PCIe/CXL

Implementation & Technical Account ManagementUpdated on Nov 11
Full-timeSan Jose, CA, USAIn-person

About the Job

Requirements

  • A Bachelor’s degree in Electrical Engineering is required; a Master’s degree is preferred.
  • At least 3 years of experience designing in complex SoC or silicon products with a high-speed interface, preferably PCIe.
  • Full professional proficiency in spoken and written Mandarin is required to communicate directly with Asia region customer contacts.
  • Strong working knowledge of PCIe LTSSM at the physical layer, associated standards, and debugging; most recent experience with at least PCIe 5.0.
  • Experience with silicon or system bring-up and debugging in customer systems.
  • Firsthand experience with lab equipment such as protocol analyzers or exercisers, high-speed oscilloscopes, or BERTs.
  • Comfort working with software or firmware associated with semiconductor products, such as firmware development in C or scripting with Python or an equivalent programming language.
  • Openness to working approximately 12:00 PM to 9:00 PM PST to enable real-time collaboration with stakeholders in the Asia Pacific time zone.

Responsibilities

  • Provide technical guidance to customers to overcome design challenges.
  • Generate collateral for existing and new products.
  • Provide insightful feedback to internal teams to improve products and processes.
  • Support development, debugging, and design-in activities for customers in the China region.
  • Coordinate with local development teams at Astera Labs headquarters.
  • Take technical ownership of issue resolution by driving and directing internal teams toward resolution.
  • Drive communication with customers, FAEs, and sales team members.

Desired Qualifications

  • Experience with PCIe 6.0 or CXL.
  • Triage complex customer-reported issues that require considering multiple layers of conditions, including silicon, firmware, hardware board design, and system environment.
  • Experience with common data center BMC implementation and BIOS configuration.
  • Development or support experience for PCIe or Ethernet switch or retimer products.
  • PCIe compliance testing methodology and troubleshooting experience.
  • Understanding of data center systems such as servers, JBODs, networking switches, routers, and interconnects.
  • Mandarin language proficiency is preferred; the candidate must be able to speak Mandarin to communicate effectively with China region customers and team members.

About the Company

Astera Labs

Designs chips that connect data center systems

Astera Labs designs chips and hardware modules that move data between processors, memory and accelerators in data centers. Its customers include cloud providers, chip vendors and equipment makers building servers and large computing clusters for AI and other workloads. Retimers restore signal quality, switches connect devices and memory controllers expand the memory available to computing systems, while COSMOS software monitors and manages these links. The company sells its products directly and through distributors, using outside manufacturers to fabricate and assemble its hardware. Astera Labs was founded in 2017 and is headquartered in San Jose, California.

Company size
501-1,000
Company stage
IPO
Headquarters
San Jose, CA
Founded
2017

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