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SK hynix

Global producer of DRAM and NAND.

Director of Buffer & Memory Subsystem Architecture

Hardware Systems IntegrationConfirmed live in the last 24 hours
Full-timeSan Jose, CA, USA

About the Job

Requirements

  • At least 8 years of experience in memory controllers, cache/prefetch architectures, SSD/storage controllers, accelerator memory systems, and DMA/data-movement architectures, including developing queueing, scheduling, and buffer-management algorithms.
  • Expertise in system performance analysis, including memory latency, bandwidth, locality, contention, and workload characterization, and translating workload traces into architectural policies.
  • HW/SW co-design experience translating AI workload, compiler, runtime, and inference-engine behavior into memory hierarchy, data-movement, prefetch, scheduling, and programming-model requirements.
  • Experience owning system architecture decisions, technical requirements, interface definitions, and performance acceptance criteria across multiple hardware and software components.
  • Experience defining functional partitioning and interface contracts across hardware, firmware, drivers, compiler/runtime, and application software.
  • Experience developing or extending architectural simulation tools using Python, C/C++, SystemC, or comparable modeling environments, including event-driven, trace-driven, or queueing-based models.

Responsibilities

  • Serve as founding technical lead of the HBF R&D team, owning HW/SW architecture decisions and technical alignment with headquarters and external partners.
  • Lead HW/SW co-design by defining architecture, functional partitioning, and interface contracts across the HBF hardware and software stack.
  • Drive HBF system optimization through memory architecture, performance modeling, and system-level implementation.
  • Develop HBF system models and event-/trace-driven simulators for AI memory performance analysis.
  • Analyze workload performance and optimize latency, bandwidth, and memory efficiency through architecture modeling.
  • Validate architectural assumptions and provide data-driven insights for cross-functional architecture decisions.
  • Define HBF memory architecture and policies.

About the Company

SK hynix

Global producer of DRAM and NAND.

Summary of SK hynix: 1) What does the company do? It is a global producer of semiconductor memory, specializing in DRAM and NAND Flash that power IT devices like computers, phones, and servers. 2) How do its products work? DRAM stores data using tiny capacitors and requires periodic refreshing to keep data, providing fast volatile memory. NAND Flash stores data in non-volatile memory cells and preserves data without power, serving as durable storage. Both chips are mounted in devices to enable fast processing and data retention. 3) How is the company different from competitors? It ranks as the second-largest memory chip maker with a broad product portfolio and strong technology, backed by the SK Group, giving it scale, resources, and global reach. 4) What is the company's goal? To become the world’s best semiconductor company by meeting diverse customer needs and leading in memory technology.

Company size
5,001-10,000
Company stage
IPO
Headquarters
Seoul, South Korea
Founded
1983

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