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Bolt Graphics

Fabless GPU designer for path-traced rendering

Technical Program Manager - ASIC/System on Chip

Program ManagementUpdated on Nov 13
Full-timeSunnyvale, CA, USA

About the Job

Requirements

  • Bachelor of Science in Electrical Engineering or equivalent.
  • 10 years of experience.
  • 10+ years of directly related semiconductor ASIC/foundry industry experience.
  • 7+ years of experience supporting ASIC customers' technical issues.
  • 7+ years of experience in program and project management.
  • Expertise in System on Chip design and integrated circuit manufacturing.
  • Experience handling large-scale electronic design automation infrastructure with various central processing unit and graphics processing unit architectures, coupled with extensive understanding of semiconductor design and manufacturing processes and associated electronic design automation tools and flows.
  • Good understanding of fabrication processes, package technologies, input/outputs, intellectual property, and testing.
  • Ability to handle multiple complex, conflicting priorities.
  • Experience coordinating complex product development across global teams.

Responsibilities

  • Collaborate with engineering leaders, including ASIC/System on Chip leads, to create project execution plans for ASIC/System on Chip development, considering criteria for designing products that meet power, performance, and functional specifications under all use conditions.
  • Work with ASIC, communication systems, electrical engineering, and software teams to define ASIC bring-up readiness and test plans.
  • Collaborate with architecture, hardware, software, firmware, packaging, and printed circuit board teams to ensure cross-functional deliverables are identified and tracked.
  • Work with external intellectual property providers, fabrication facilities, outsourced semiconductor assembly and test providers, silicon services, and partners to complete project execution on time.
  • Lead end-to-end execution of ASIC/System on Chip development programs from concept through production.
  • Build and manage integrated schedules across architecture, register-transfer-level design, verification, design for test, physical design, packaging, post-silicon validation, qualification, and manufacturing ramp.
  • Drive cross-functional execution across ASIC design, design verification, physical design, computer-aided design, firmware, board, package, test, reliability, supply chain, and manufacturing teams.
  • Manage ASIC projects from pre-sales through design award, tape-out, and production.
  • Drive issue resolution during pre-silicon execution, tape-out, bring-up, debugging, qualification, and yield learning.
  • Support silicon planning across performance, power, area, cost, reliability, and manufacturability tradeoffs.

About the Company

Bolt Graphics

Fabless GPU designer for path-traced rendering

Bolt Graphics designs GPUs for rendering, high-performance computing, and gaming, focusing on professional workloads like visual effects, architecture visualization, scientific simulation and render farms. Its Zeus GPU architecture, announced in 2025, uses hardware-accelerated path tracing and FP64 compute, with a RISC-V core, expandable DDR5 memory on PCIe cards and servers, built-in high-speed Ethernet for direct GPU-to-GPU connections, and acceleration for electromagnetic wave simulation. This combination supports scalable deployments on PCIe cards, servers, and cloud platforms, without relying on AI upscaling.

Company size
51-200
Company stage
Not listed
Total funding
Not listed
Headquarters
Sunnyvale, CA
Founded
2020

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