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Micron Technology

Makes memory and storage chips for AI and PCs

DRAM Technology Physical Design and Block-Level PPA Optimization Intern

Silicon & ASIC DesignConfirmed live in the last 24 hours
Internship · Winter 2026Boise, ID, USANo salary listedIn-person

About the Job

Requirements

  • Currently pursuing a B.S. or M.S. degree in Electrical Engineering, Computer Engineering, or a related technical field.
  • Demonstrated understanding of VLSI design concepts, CMOS circuits, digital logic, and the ASIC physical design flow.
  • Experience through coursework, research, or projects using scripting languages such as Python, Perl, or Tcl.
  • Expected graduation date of Fall 2025 or later.

Responsibilities

  • Implement standard cell logic blocks using industry-standard physical design tools, including floorplanning, placement, clock tree synthesis, routing, and optimization activities focused on power, performance, and area assessment.
  • Analyze and benchmark power, performance, and area across standard cell libraries and logic block configurations, identifying opportunities for improvement.
  • Perform static timing analysis, investigate setup and hold timing violations, and support timing closure activities.
  • Execute physical verification checks, including design rule checking, layout versus schematic, and IR-drop analysis, and assist with resolving design issues.
  • Leverage Generative AI, AI Assistants, and Agentic AI solutions to automate data collection, reporting, comparison, and workflow optimization for power, performance, and area analysis.

Desired Qualifications

  • Hands-on academic, research, or project experience with place-and-route tools such as Synopsys ICC2, Cadence Innovus, or equivalent tools.
  • Exposure to static timing analysis tools such as PrimeTime, Tempus, or similar timing verification platforms.
  • Working knowledge of design constraints, Synopsys Design Constraints, Library Exchange Format/Design Exchange Format formats, and physical implementation methodologies.
  • Understanding of low-power design techniques and power intent standards such as Unified Power Format or Common Power Format.
  • Experience applying AI, Generative AI, Large Language Models, or AI-assisted coding and automation tools to improve engineering workflows and productivity.

About the Company

Micron Technology

Makes memory and storage chips for AI and PCs

Micron Technology designs and manufactures memory and storage chips, mainly DRAM and NAND flash, used in data centers, PCs, phones, cars and industrial equipment. It is one of only three companies that make HBM, the stacked high-bandwidth memory placed beside processors in AI servers, and it is the largest memory chipmaker based in the United States. Unlike chip designers that outsource production, Micron runs its own fabs and assembly sites in the United States and across Asia. It earns money by selling chips, memory modules and solid-state drives to cloud providers, device makers and distributors. Micron was founded in 1978 and is headquartered in Boise, Idaho.

Company size
10,001+
Company stage
IPO
Headquarters
Boise, ID
Founded
1978

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