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Rambus

Licenses high-speed chip-to-chip connectivity IP

IP Design Automation Manager

Engineering LeadershipPosted on Nov 10
Full-time

About the Job

Requirements

  • A BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related field is required.
  • At least 10 years of experience in semiconductor design automation, CAD, EDA, ASIC/IP development, or a related area is required.
  • Experience leading and/or managing engineers is required; experience in a global or multi-site environment is preferred.
  • Strong hands-on software development and automation experience, particularly with Python, is required; experience with Tcl, Perl, shell, or similar tools is valuable.
  • An understanding of semiconductor design and verification workflows and experience working with industry EDA tools are required.
  • Ability to work closely with multiple IP/design teams, understand their requirements, and balance competing priorities is required.
  • Strong problem-solving, communication, collaboration, and project-management skills are required.
  • Ability and interest to remain technically hands-on while leading and developing a team are required.

Responsibilities

  • Lead, mentor, and develop a global team of IP design automation engineers.
  • Deliver and maintain automation, tools, and flows used for IP design, verification, delivery, and support.
  • Serve as a hands-on technical contributor, directly owning and delivering one or more well-scoped design automation projects while leading the broader team.
  • Work closely with IP project teams to understand their needs, identify common requirements, and develop solutions that can be reused across projects.
  • Work with IP teams to prioritize and accommodate project-specific requirements where needed.
  • Help balance support workload across team members using the team's bug/issue tracking system.
  • Work closely with design, verification, CAD, and other engineering teams.
  • Leverage AI technology to improve engineering productivity.
  • Help define strategic priorities and longer-term direction for IP design automation.

Desired Qualifications

  • Experience with IP design and verification flows such as RTL development, simulation, synthesis, lint, CDC/RDC, physical design, or signoff.
  • Experience with EDA tools from Cadence, Synopsys, Siemens, or similar vendors.
  • Experience with issue tracking, revision control, automated testing, or CI/CD environments.
  • Experience developing reusable automation or methodologies used across multiple design projects.
  • Experience with AI-assisted engineering or design automation.

About the Company

Rambus

Licenses high-speed chip-to-chip connectivity IP

Rambus designs, develops, and licenses high-speed chip-to-chip connectivity technology. Its IP powers data center servers, AI accelerators, and automotive systems, and is licensed to other semiconductor companies rather than manufactured and sold directly. The products are high-speed interfaces and security features embedded in chips, enabling fast, reliable communication between components. Rambus differentiates itself through a licensing-based model focused on advanced IP for memory, security, and high-speed interfaces across data centers, AI, and automotive markets, rather than relying on a traditional product lineup. The company’s goal is to enable high-performance chip communication at scale by monetizing its intellectual property through licensing and expanding into growing markets like data centers, AI, and automotive.

Company size
1,001-5,000
Company stage
IPO
Headquarters
San Jose, CA
Founded
1990

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