V

Velaura

Designs energy-efficient AI silicon and systems

RTL Designer

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeSanta Clara, CA, USA$150k - $250k /yr

About the Job

Requirements

  • Experience designing RTL for complex digital systems.
  • Strong understanding of computer architecture, microarchitecture, and digital design fundamentals.
  • Experience with Verilog and SystemVerilog and modern RTL design methodologies.
  • Familiarity with performance, power, and area tradeoffs.
  • Understanding of memory systems, interconnects, caches, DMA engines, or accelerator architectures.
  • Experience with hardware/software co-design and system-level performance optimization.
  • Ability to work effectively in a collaborative, multidisciplinary engineering environment.

Responsibilities

  • Design, implement, and optimize RTL for key portions of the Velaura SoC.
  • Collaborate with architects to develop robust and efficient microarchitectures.
  • Participate in hardware/software co-design discussions spanning AI workloads, memory systems, runtime software, and system architecture.
  • Work with software teams to define hardware interfaces, execution flows, memory hierarchies, and performance-critical interactions.
  • Contribute to compute engines, memory subsystems, interconnect fabrics, control processors, DMA engines, power-management logic, and other core SoC infrastructure.
  • Optimize designs for performance, power, area, scalability, and reliability.
  • Partner closely with verification and physical design teams throughout the development cycle.
  • Analyze performance bottlenecks and propose architectural and implementation improvements.
  • Leverage modern engineering tools, including AI-assisted development workflows, to improve productivity, quality, and design exploration.
  • Participate in design reviews and contribute to a culture of technical excellence.

Desired Qualifications

  • Experience with AI, machine learning, or edge AI hardware.
  • Familiarity with robotics, drones, autonomous vehicles, or industrial automation systems.
  • Knowledge of low-power design techniques and power management architectures.
  • Exposure to performance modeling, emulation, FPGA prototyping, or silicon bring-up.
  • Experience using modern AI tools and workflows to accelerate engineering productivity.
  • Background in CPUs, GPUs, AI accelerators, networking and communications silicon, storage and data movement architectures, robotics and autonomous systems, automotive and advanced driver-assistance systems (ADAS), aerospace and defense systems, real-time and safety-critical computing, or functional safety architectures and methodologies.

About the Company

Velaura

Designs energy-efficient AI silicon and systems

Velaura AI designs and manufactures ultra-energy-efficient AI infrastructure, including 3nm ASIC chips, Teraflux mining systems, FluxVision fleet-management software, and AuraLinks rack-level networking. Customers deploy the hardware in data centers, while FluxVision monitors and manages fleets; EnergyTune and AutoTune dynamically adjust power to meet grid stability, and AuraLinks reduces bottlenecks in AI training and inference. The company differentiates itself with a team of silicon architects from Apple, Google, and Qualcomm, plus a patent-pending energy-management approach and a fully integrated hardware-software stack. Its goal is to enable massive AI deployment by delivering powerful, energy-efficient compute and networking that aligns with sustainable energy grids and domestically produced technology.

Company size
51-200
Company stage
Series A
Total funding
$424M
Headquarters
Santa Clara, CA
Founded
2022

Recently Posted Jobs

Explore more opportunities at Velaura

See more jobs