CScale

Optical interconnects for large-scale AI infrastructure

EVT/DVT Engineer - Optics & Photonics

Hardware Validation & TestingConfirmed live in the last 24 hours

Full-timePalo Alto, CA, USAIn-person

About the Job

Requirements

A BS or MS in Optics, Physics, Electrical Engineering, or a related field with 4+ years of industry experience, or a PhD with 1+ year of industry experience.
Strong hands-on experience in optics and photonics experimentation, including building and aligning optical setups, fiber handling and splicing, and making repeatable measurements.
Experience handling and testing semiconductor devices such as laser diodes, photodetectors, modulators, or photonic integrated circuits, including probing and electrostatic discharge-safe practices.
Working knowledge of optical test equipment, including power meters, optical spectrum analyzers, tunable laser sources, source-measure units, and oscilloscopes.
Ability to prioritize and adapt in a fast-paced build-up environment and get hardware working at the bench.
Ability to document test results clearly and communicate them to cross-functional teams.

Responsibilities

Plan and execute engineering validation test and design validation test campaigns for photonic integrated circuits, lasers, and optical subassemblies, including test plans, sample sizes, pass/fail criteria, and reports.
Design, build, and align free-space and fiber-coupled optical test setups, including fiber-to-chip coupling, polarization control, and power, spectral, and loss measurements.
Characterize semiconductor optical devices by measuring light-current-voltage curves, spectra, side-mode suppression ratio, relative intensity noise, responsivity, dark current, insertion loss, extinction ratio, and wavelength tuning.
Safely handle bare die, chips on carrier, and wafers using electrostatic discharge control, probing, die attach, and cleanroom or clean-bench practices.
Run environmental and reliability tests, including temperature cycling, thermal sweeps, and humidity testing, and track performance drift.
Automate measurements and data collection, analyze results to find root causes, and feed fixes back to design and process teams.
Stand up new test stations as the program scales and write procedures so others can run them.
Work with photonics design, electronics, packaging, and manufacturing engineers to move hardware through build phases on schedule.

Desired Qualifications

Knowledge of optical communications, including wavelength-division multiplexing/coarse wavelength-division multiplexing grids, transceiver specifications, link budgets, non-return-to-zero and four-level pulse-amplitude modulation, or coherent modulation.
Experience with high-speed optical measurements, including eye diagrams, bit-error-rate testing, equalization, and electro-optic bandwidth.
Prior work on silicon photonics or III-V platforms, including wafer-level or die-level photonic integrated circuit testing.
Direct experience with engineering validation test, design validation test, and production validation test phase gates, design of experiments, and statistical analysis.
Instrument automation with PyVISA/SCPI and building multi-channel automated test stations.

CScale is building the interconnect for gigawatt-scale AI. As AI scale-up moves toward deployments spanning thousands of accelerators and dozens of racks, the network needs to deliver high bandwidth, predictable low latency, and continuous communication. CScale is building integrated optical interconnect designed for this new scale, enabling accelerators to work together like a single, much larger computer. But at this scale, performance is only part of the challenge. Optical failures are inevitable, and the system needs to keep running. CScale is designing the interconnect for continuity.Lasers will fail. Compute shouldn’t.The ambition is simple:Build AI interconnect you can take for granted.CScale came out of stealth in September 2026 with $145 million in Series C funding, bringing total funding to $188 million.

We are hiring an EVT/DVT Engineer to run the optical and photonic experiments that take our photonic hardware from first silicon to design-validated product. You will build test setups, handle bare semiconductor devices, and turn measurements into clear go/no-go decisions.

This is a hands-on lab role in a fast-paced engineering build-up. We are looking for someone who likes to stand up new setups quickly, debug at the bench, and own results end to end.

What you'll do

Plan and execute EVT and DVT test campaigns for photonic integrated circuits, lasers, and optical subassemblies: test plans, sample sizes, pass/fail criteria, and reports.

Design, build, and align free-space and fiber-coupled optical test setups, including fiber-to-chip coupling, polarization control, and power, spectral, and loss measurements.

Characterize semiconductor optical devices: LIV curves, spectra, SMSR, RIN, responsivity, dark current, insertion loss, extinction ratio, and wavelength tuning etc.

Handle bare die, chips on carrier, and wafers safely: ESD control, probing, die attach, and cleanroom or clean-bench practices.

Run environmental and reliability tests (temperature cycling, thermal sweeps, humidity) and track performance drift.

Automate measurements and data collection and analyze results to find root causes and feed fixes back to design and process teams.

Stand up new stations quickly as the program scales, and write procedures so others can run them.

Work closely with photonics design, electronics, packaging, and manufacturing engineers to move hardware through build phases on schedule.

Required qualifications

BS/MS in Optics, Physics, Electrical Engineering, or a related field with 4+ years of industry experience, or a PhD with 1+ year of industry.

Strong hands-on experience in optics and photonics experimentation: building and aligning optical setups, fiber handling and splicing, and making repeatable measurements.

Experience handling and testing semiconductor devices such as laser diodes, photodetectors, modulators, or PICs, including probing and ESD-safe practices.

Working knowledge of optical test equipment: power meters, optical spectrum analyzers, tunable laser sources, SMUs, and oscilloscopes.

Comfort in a fast-paced build-up environment: you prioritize, adapt quickly, and get hardware working at the bench.

Clear documentation and communication of test results to cross-functional teams.

Preferred qualifications

Knowledge of optical communications: WDM/CWDM grids, transceiver specs, link budgets, NRZ and PAM4 or coherent modulation.

Experience with high-speed optical measurements: eye diagrams, BER testing, equalization, and electro-optic bandwidth.

Prior work on silicon photonics or III-V platforms, including wafer-level or die-level PIC testing.

Direct experience with EVT/DVT/PVT phase gates, design-of-experiments, and statistical analysis.

Instrument automation with PyVISA/SCPI and building multi-channel automated test stations.

Compensation includes a base salary of $150,000–$250,000 and equity in CScale. Final offers depend on experience, market conditions and location.

About the Company

CScale

Optical interconnects for large-scale AI infrastructure

CScale builds optical interconnects for large-scale AI computing. Its integrated light engines power gigawatt-scale AI facilities by containing optical failures and keeping compute running across thousands of closely connected accelerators. The hardware provides high-bandwidth, ultra-low-latency optical links to connect accelerators across racks, making data movement between chips dependable for continuous AI workloads. Unlike many data-center components that rely on electronic signaling, CScale focuses on silicon photonics and photonic hardware to deliver scalable, reliable communication at scale. Founded in 2023 in Palo Alto, the company exited stealth in 2026 and has investors including NVIDIA and Intel Capital. Its goal is to enable uninterrupted AI training and inference across large AI infrastructure by delivering dependable optical interconnects that scale as data-center needs grow.

Company size: 51-200
Company stage: Series C
Total funding: $145M
Headquarters: Palo Alto, CA
Founded: 2023

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