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Synopsys

EDA software for chip design

Applications Engineering Principal Engineer

Implementation & Technical Account ManagementConfirmed live in the last 24 hours
Full-timeUnited StatesIn-person

About the Job

Requirements

  • At least 10 years of hands-on experience with hardware emulation platforms such as Synopsys ZeBu, Mentor Veloce, or Cadence Palladium, including deployment, debugging, and performance optimization.
  • Deep proficiency in Verilog, SystemVerilog, and VHDL, including reading, debugging, and optimizing RTL for emulation.
  • Strong understanding of verification methodologies, including UVM, constrained-random testing, and coverage-driven verification in emulation environments.
  • Solid understanding of SoC and ASIC architecture, including subsystem integration, interconnect protocols, memory hierarchies, and software/hardware co-verification flows.
  • Experience using Python, Perl, or TCL for automation, flow development, and data analysis in emulation and verification contexts.
  • Ability to debug complex interactions across RTL, testbenches, emulation hardware, and embedded software, and isolate issues spanning multiple domains.
  • Experience in customer-facing technical roles such as field applications engineering, customer support engineering, or technical consulting, with a track record of solving difficult problems under pressure.

Responsibilities

  • Lead technical customer engagements for ZeBu or other emulation platform deployments, diagnosing performance bottlenecks, debugging issues, and workflow inefficiencies that impede verification progress.
  • Design emulation strategies for complex SoC and ASIC projects, defining partitioning approaches, testbench integration, and bring-up sequences under real project constraints.
  • Collaborate with Synopsys R&D teams to escalate product gaps, influence roadmap priorities, and validate new features against customer use cases before release.
  • Develop and deliver technical training sessions, workshops, and best-practice guides for customer engineering teams and internal application engineers.
  • Troubleshoot critical emulation failures in live customer environments across hardware, RTL, testbench, and software layers to isolate root causes and restore productivity.
  • Mentor junior applications engineers on emulation methodologies, debugging techniques, and customer engagement strategies.
  • Accelerate customers’ verification closure through emulation strategies for AI accelerators, automotive SoCs, and hyperscale processors.
  • Expand ZeBu adoption across new customer segments by validating use cases, building reference flows, and demonstrating measurable return on investment in real project contexts.
  • Translate customer pain points into actionable R&D requirements to shape the emulation product roadmap and improve performance, usability, and scalability.
  • Build long-term technical partnerships with lead architects and verification managers at semiconductor companies, advising them on emulation and verification strategy.
  • Create reusable methodologies, automation scripts, and documentation to address recurring issues and reduce customer escalations and support load.

About the Company

Synopsys

EDA software for chip design

Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.

Company size
10,001+
Company stage
IPO
Headquarters
Sunnyvale, CA
Founded
1986

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