Senior ASIC Verification Design Automation Engineer

At Cornelis we’re building the future of AI and HPC networking with an AI-first approach to silicon and software development. We’re seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale.

Cornelis Networks delivers the world’s highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the world’s most demanding computational challenges with our next-generation networking solutions. 

We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles.  

We are hiring  a Senior ASIC Verification Design Automation Engineer with strong design automation, AI based flow development, (agents, skills), scripting , infrastructure, and verification environment experience to support the development and execution of scalable ASIC verification flows for world-class SoCs used in high-performance computing, high-performance data analytics, and artificial intelligence interconnect solutions.

Key Responsibilities:

• Develop, maintain, and improve AI based flows for verification infrastructure, automation frameworks, and execution environments used across block, subsystem, and SoC-level ASIC verification

• Build and support scalable regression flows, dashboards, reporting utilities, and triage automation to improve verification productivity and visibility

• Create and enhance scripts, tools, and integrations using Python, Perl, Tcl, shell scripting, Make, and related automation technologies

• Support simulation, coverage, lint, formal, emulation, and continuous integration flows in collaboration with verification, design, architecture, and CAD teams

• Manage compute, storage, license, queue, and job-dispatch related infrastructure issues impacting verification execution and turnaround time

• Drive automation improvements that make verification environments more reliable, reproducible, debuggable, and efficient across geographically distributed teams

Minimum Qualifications:

• 8+ years of post-college experience in design automation, verification automation, CAD, infrastructure, or ASIC verification support
• Knowledge of SystemVerilog/UVM verification methodologies and the ability to partner effectively with verification engineers
• Experience with Github Actions, Git workflows, job schedulers, data analytics, and automation for regression management, coverage tracking, and productivity metrics
  

• Experience with scripting and automation using Python, Perl, Tcl, shell scripting, or similar languages

• Experience supporting Linux-based engineering environments, source-control systems, build flows, regression execution, and EDA tool integration

• Ability to debug automation failures, tool/runtime issues, infrastructure bottlenecks, and workflow inefficiencies in complex verification environments

• B.S. Degree in Computer Engineering, Computer Science, Electrical Engineering, or a related technical discipline

Preferred Qualifications:

• M.S. Degree in Computer Engineering, Computer Science, Electrical Engineering, or a related technical discipline
• Experience supporting large-scale ASIC verification environments, regression farms, EDA tool flows, and distributed compute infrastructure

Location:  This is a remote position for employees residing within the United States.

We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry.  

At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives. 

In addition to your base pay, you’ll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave. 

Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.