Analog Layout Design Engineer
Altera
Analog Layout Design Engineer
Altera
FPGA and SoC provider with software
Designs complex layouts of analog signal circuits for a given design specification and runs complete set of design verification tools for process design rules, electron migration, voltage drop (IR), ESD, and other reliability checks on the layouts. Designs and analyzes floorplans, power grid, ESD, bumps, and performs all required verification on the analog blocks. Performs the micro-floor planning and detail signal planning of complex analog circuits to meet performance and electrical requirements (shielding, matching) for critical signals to optimize for area, power, RV, and performance. Develops and drives new and innovative analog layout methodologies to improve layout productivity and quality. Collaborates with analog circuit design, process technology, and package design teams to meet design specifications, plan work, and negotiate layout trade-offs as needed. Troubleshoots a wide variety of issues up to and including design and tool/flow/methodology used in analog layout design.
BTech/MTech with 3 + years of relevant experience
Altera designs and manufactures FPGAs and SoCs, along with software tools for hardware design and deployment. Customers can configure these programmable chips after fabrication to fit specific applications, helping them reach market faster and optimize performance. The company differentiates itself by offering a broad configurable silicon platform and a dedicated design software suite as an independent provider after its separation from Intel. Its goal is to deliver high-performance, adaptable processing solutions for industries like automotive, aerospace, communications, AI, cloud, and edge computing.
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