Applications Engineering Senior Director
Synopsys
Applications Engineering Senior Director
Synopsys
EDA software for chip design
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You are a bold, transformative leader with a deep technical foundation in semiconductor engineering. You thrive at the intersection of business strategy, customer engagement, and technical execution, always seeking ways to modernize and scale impact. Your expertise spans silicon development, interface IP technologies—including DDR, HBM, and other high-speed protocols—and you are recognized for your ability to build high-performing global teams. You embrace the challenge of transitioning traditional engineering models to data-driven, AI-augmented paradigms, leveraging technology to deliver repeatable, high-quality outcomes for customers in diverse sectors from HPC to automotive.
As a trusted partner to both internal and external stakeholders, you have the executive presence and communication skills to influence senior leadership, shape long-term engagement models, and drive cross-functional alignment. You are passionate about digital transformation, championing AI adoption to elevate engineering effectiveness and operational discipline. Your leadership style is inclusive and empowering, focused on mentoring and growing the next generation of technical experts. Above all, you are committed to fostering a culture of ownership, continuous improvement, and customer-centric innovation, positioning Synopsys’ interface IP business for its next phase of growth.
The Team You’ll Be A Part Of:
Join a forward-thinking, global interface IP engineering group committed to delivering high-impact solutions across industries such as HPC, automotive, and beyond. The team is focused on modernizing customer engagement, scaling expertise through AI, and fostering a culture of continuous improvement and technical excellence. Together, you will bridge customer needs, business priorities, and technical execution, advancing Synopsys’ interface IP business to its next phase of growth.
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.
Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.
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