Analog Design Staff Engineer
Synopsys
Analog Design Staff Engineer
Synopsys
EDA software for chip design
We Are:At Synopsys, our Silicon IP business is expanding to serve growing demand for special-purpose silicon. We are moving beyond traditional standards-based IP into application-optimized IP (AOIP), helping customers develop differentiated silicon tailored to specific workloads and system architectures. As AI drives demand for custom silicon across hyperscalers and system companies, we use our interface IP leadership, system expertise, and engineering scale to deliver optimized IP subsystems and platforms that accelerate time-to-market while improving performance and efficiency. The acceleration of frontier intelligence is fueling an unprecedented demand for compute power while increasing system complexity, and purpose-built silicon is reshaping the IP market. You Are:You are analog design engineer with a passion for creating cutting-edge technology. With a strong foundation in electrical engineering, you possess extensive experience in analog design simulation and analysis. You are adept at using various EDA tools for schematic entry, physical layout, and design verification, including SPICE notation and tools like Synopsys Custom Compiler or Cadence Virtuoso. Your familiarity with analog design simulation and testbench methodology, including AC, DC, Transient, and Monte-Carlo verifications, sets you apart. Your strong communication skills in English enable you to effectively document methods and training materials, ensuring your team can leverage new tools and flows to increase efficiency. You are proactive in providing feedback to improve internal tools and are committed to streamlining design processes and reducing time-to-market. What You’ll Be Doing:
The Analog Integration Team (AIT) exists to coordinate and accelerate methodology adoption across analog and adjacent engineering domains, including circuit-to-layout, circuit-to-timing, silicon-to-lab correlation, SI/PI integration, and other mixed-signal cross-domain workflows. In this role, you will:
- Provide clear ownership for analog and adjacent-domain methodology areas.
- Act as the focal point for customer-driven methodology requirements and integration challenges.
- Be accountable for prioritization, adoption, stakeholder engagement, and execution.
- Improve coordination across product teams and adjacent engineering organizations, including engagement with customers and foundries.
- Support methodology for application-optimized IP and the special-purpose silicon customers are building for specific workloads and system architectures.
The Impact You Will Have:
- Establish sustainable ownership for analog and adjacent-domain methodologies.
- Improve responsiveness to customer methodology requirements.
- Reduce ambiguity on methodology ownership and escalation paths.
- Improve alignment between methodology strategy and execution.
- Accelerate methodology adoption for strategic initiatives and customers, including application-optimized IP for special-purpose silicon.
- Provide measurable accountability for methodology development, deployment, and customer engagement.
What You’ll Need: - Bachelor’s degree in electrical engineering and a minimum of 5 years of related experience or a Master’s degree in electrical engineering and a minimum of 3 years of related experience. - Analog design skills and experience with designing for optimal PPA (power, performance, and area).- Proficiency in simulation using various analog design tools.- Experience with EDA tools for schematic entry, physical layout, and design verification.- Knowledge of analog layout parasitics, especially for low nm technologies (FinFET, GAA). This role is open to Porto and Lisbon. Who You Are:- Excellent communication skills in English.- A team player with a collaborative mindset.- Proactive in debugging and resolving issues independently.- Skilled in creating clear and concise documentation. The Team You’ ll Be A Part Of:You will join the Analog Integration Team (AIT). AIT coordinates and accelerates methodology adoption across analog and adjacent engineering domains. The team owns those methods end-to-end: customer requirements, integration challenges, prioritization, stakeholder engagement, and execution. You will work with product teams, adjacent engineering organizations, and directly with customers and foundries. The team’s job is to turn methodology strategy into accountable action and to help strategic IP programs adopt it faster.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.
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