Principal ASIC Design Engineer

Principal ASIC Design EngineerThis role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office.

Job Description:

Job Family Definition:

Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits. Analyzes designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions. May direct support personnel in the preparation of detailed design, design testing and prototype fabrication.

Management Level Definition:

Contributions have visible technical impact on a product or major subcomponent.  Applies in-depth professional knowledge and innovative ideas to solve complex problems. Visible contributions improve time-to-market, achieve cost reductions, or satisfy current and future unmet customer needs. Recognized internal authority on key technology area applying innovative principles and ideas. Provides technical leadership for significant project/program work. Leads or participates in cross-functional initiatives and contributes to mentorship and knowledge sharing across the organization.

Responsibilities:

• Architect complex modules and subsystems used in high performance networking chips.

• Write detailedfunctionalas well as the micro-architecture specification for yourmodule withthatmeet the power/area/performance targets.

• Implement the design using Verilog or System Verilog 

• Write functional coverage/SVA to help verification catch corner case bugs.

• Make sure your module meets the power targets by usingstate-of-the-artpower reduction techniques during architecture and implementation phases.

• Work with Physical design team for timing closure. Fix timing in RTL to meet the frequency target. 

• Collaborate with the Verification team to make sure your block is fullyvalidated.

• Show leadership and provide guidance to new college-grad/juniorengineers and interns. 

Recommended skills

• Bachelor’s degree in Electrical Engineeringrequired (Master’sstronglydesired) with 15+ years of relevant experience.

• Strong analytical/ problem solving skills.

• Demonstrated skills inleading andimplementing high performancesubsystemsfrom specification to final netlist.

• Knowledge of Computer Architecture/networking protocols through prior work isstronglydesired.

• Strong coding skills in Verilog/System Verilog throughpreviouswork experience are necessary. 

• Knowledge of synthesis/lint and other tools used in typical ASIC developmentprocessis highly desired.

• Excellent written and verbal communications skillsisnecessary.

• Knowledge of Perl/Python is strongly desired. 

Accessibility

HPE is committed to creating an inclusive and accessible workplace and encourages applications from all qualified individuals, including those with disabilities. If you believe you require accommodation during any stage of the application or interview process, please submit your request by completing our secure form linked here.

Note: This option is reserved for applicants needing assistance/reasonable accommodation related to a disability.

Health & Wellbeing

We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.

Personal & Professional Development

We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division.

Unconditional Inclusion

We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

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Job:

Engineering

Job Level:

TCP_05"The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level.
– United States of America: Annual Salary USD 181,000 - 367,000 in California
The listed salary range reflects base salary. Variable incentives may also be offered."

Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html

Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.

HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories.

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