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Aumovio

Software-defined vehicles hardware and software solutions

SiP System and Design Architect

Hardware Systems IntegrationConfirmed live in the last 24 hours
Part-timeRegensburg, GermanyNo salary listed

About the Job

Requirements

  • An academic degree in Electrical Engineering, Microelectronics, or a comparable qualification.
  • In-depth experience in semiconductor technology.
  • Long-term experience in integrated-circuit design methodology and electronic design automation tools.
  • Several years of experience in system-on-chip, multi-die, system-in-package, or complex embedded-system architecture.
  • In-depth experience in system architecture, chip partitioning, performance modeling, interface definition, and hardware/software co-design.
  • Profound experience with SystemC, Transaction-Level Modeling, or comparable virtual prototyping and architecture exploration methods.
  • Deep knowledge of high-speed die-to-die and package interfaces, including Universal Chiplet Interconnect Express, protocol concepts, signal and power integrity constraints, and substrate design fundamentals.
  • Knowledge of boot, clock, reset, power management, diagnostics, functional safety, cybersecurity interfaces, redundancy, and repair concepts.
  • Business-fluent English skills, written and spoken.
  • Ability to learn continuously and remain open and flexible to new tasks and fields.
  • Good communication skills.
  • Customer focus, including anticipating and understanding customer needs.
  • Ability to contribute toward team goals.

Responsibilities

  • Translate product and use-case requirements into executable system-in-package functional architectures, chip or chiplet partitions, and package-level design concepts.
  • Develop system-in-package floorplans, die-to-die communication concepts, substrate electrical architecture, and package-board interfaces.
  • Develop system-level concepts covering performance, dataflow, timing, boot, power management, functional safety, cybersecurity interfaces, testability, redundancy, and repair.
  • Set up virtual architecture models for early performance assessment and design-space exploration before physical implementation.
  • Maintain architecture specifications, interface definitions, design constraints, and cross-domain alignment among system, silicon, software, package, test, and manufacturing stakeholders.
  • Represent AUMOVIO in relevant external industry associations, consortia, and collaborative research programs, and transfer applicable results, requirements, and ecosystem developments into internal system-in-package architecture activities.
  • Capture and analyze product requirements, workloads, interfaces, safety goals, timing constraints, power targets, package limitations, and cost assumptions.
  • Develop alternative chip and chiplet partitioning concepts and evaluate functional allocation, dataflow, latency, bandwidth, power, reuse, supply risk, and scalability.
  • Create SystemC and Transaction-Level Modeling-based executable models for architecture exploration, performance assessment, and interface evaluation.
  • Define die-to-die interface requirements and protocol concepts, including bandwidth, latency, coherency, link initialization, monitoring, error handling, and interoperability constraints.
  • Develop preliminary system-in-package floorplans covering die placement, interface proximity, routing resources, power distribution, thermal constraints, keep-out regions, and test access.
  • Define package electrical architecture, including substrate stack-up requirements, high-speed routing constraints, power-delivery concepts, grounding, and decoupling strategy.
  • Develop architecture concepts for boot, power sequencing, clocking, reset, diagnostics, functional safety, cybersecurity interfaces, redundancy, and repair.
  • Define design-for-test, design-for-manufacturability, design-for-reliability, and system-level test requirements with the respective experts and external partners.
  • Coordinate architecture trade-offs and design reviews with product, integrated-circuit, software, package, simulation, test, safety, security, and supplier stakeholders.
  • Maintain architecture documents, interface specifications, assumptions, verification criteria, technical risks, and reusable system-in-package design guidelines.

Desired Qualifications

  • Experience with package or substrate floorplanning, electrical package design, layout constraints, and design-rule handover.
  • Experience in design for test, system-level test concepts, and requirements engineering for automotive electronics.
  • German language skills.

About the Company

Aumovio

Software-defined vehicles hardware and software solutions

Aumovio provides hardware and software for software-defined vehicles (SDVs) across Autonomous Mobility, Safety and Motion, User Experience, and Architecture and Network Solutions. Its products include sensor systems, displays, braking and comfort systems, software platforms, and driver-assistance systems, plus platforms like Green Electric Caliper, Xelve, and Road to Cloud for SDVs. Born from a 2025 spin-off of Continental’s Automotive group, it operates as an independent company based in Frankfurt and serves nearly all leading automakers worldwide. The company aims to grow long-term sales beyond €24 billion and achieve an adjusted EBIT margin of 6.0–8.0%, by expanding software-enabled mobility and cloud connectivity.

Company size
501-1,000
Company stage
IPO
Headquarters
Frankfurt, Germany
Founded
2025

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